Design of a digital interferometric demodulator

Design of a digital interferometric demodulator

This thesis investigates the design of a digital fiber-optic interferometric demodulator based upon a passive symmetric combination of signals produced by an interferometer terminated with a 3x3 optical coupler. The demodulator was implemented using a digital signal processing (DSP) board based upon...

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Main Author: Brenner, David William
Other Authors: Keolian, Robert.
Language:en_US
Published: Monterey, California. Naval Postgraduate School 2013
Online Access:http://hdl.handle.net/10945/30921
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spelling ndltd-nps.edu-oai-calhoun.nps.edu-10945-309212014-11-27T16:17:46Z Design of a digital interferometric demodulator Brenner, David William Keolian, Robert. NA NA Engineering Acoustics This thesis investigates the design of a digital fiber-optic interferometric demodulator based upon a passive symmetric combination of signals produced by an interferometer terminated with a 3x3 optical coupler. The demodulator was implemented using a digital signal processing (DSP) board based upon a TMS320C31 DSP processor. The demodulator was tested using signals produced by a set of interferometric simulators which used an analog AD639 trigonometric chip. A goal of this thesis was to demonstrate an improved noise floor at low frequencies as compared with a similar analog implementation. 2013-04-26T18:59:57Z 2013-04-26T18:59:57Z 1994-09 Thesis http://hdl.handle.net/10945/30921 en_US This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, it may not be copyrighted. Monterey, California. Naval Postgraduate School
collection NDLTD
language en_US
sources NDLTD
description This thesis investigates the design of a digital fiber-optic interferometric demodulator based upon a passive symmetric combination of signals produced by an interferometer terminated with a 3x3 optical coupler. The demodulator was implemented using a digital signal processing (DSP) board based upon a TMS320C31 DSP processor. The demodulator was tested using signals produced by a set of interferometric simulators which used an analog AD639 trigonometric chip. A goal of this thesis was to demonstrate an improved noise floor at low frequencies as compared with a similar analog implementation.
author2 Keolian, Robert.
author_facet Keolian, Robert.
Brenner, David William
author Brenner, David William
spellingShingle Brenner, David William
Design of a digital interferometric demodulator
author_sort Brenner, David William
title Design of a digital interferometric demodulator
title_short Design of a digital interferometric demodulator
title_full Design of a digital interferometric demodulator
title_fullStr Design of a digital interferometric demodulator
title_full_unstemmed Design of a digital interferometric demodulator
title_sort design of a digital interferometric demodulator
publisher Monterey, California. Naval Postgraduate School
publishDate 2013
url http://hdl.handle.net/10945/30921
work_keys_str_mv AT brennerdavidwilliam designofadigitalinterferometricdemodulator
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