Design, fabrication, and assembly of a test platform for a high-speed GaAs DRAM VLSI IC

Design, fabrication, and assembly of a test platform for a high-speed GaAs DRAM VLSI IC

The goal of this project is to redesign, fabricate, and assemble a digital circuit operating near a frequency of 250 MHz to test a new experimental Gallium Arsenide (GaAs) Dynamic Random Access Memory (DRAM). This thesis presents the redesigned six-layer printed circuit test fixture and the design o...

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Main Author: Ginter, Byron A.
Other Authors: Fouts, Douglas J.
Language:en_US
Published: Monterey, California. Naval Postgraduate School 2013
Online Access:http://hdl.handle.net/10945/30816
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spelling ndltd-nps.edu-oai-calhoun.nps.edu-10945-308162014-11-27T16:17:42Z Design, fabrication, and assembly of a test platform for a high-speed GaAs DRAM VLSI IC Ginter, Byron A. Fouts, Douglas J. NA NA Electrical Engineering The goal of this project is to redesign, fabricate, and assemble a digital circuit operating near a frequency of 250 MHz to test a new experimental Gallium Arsenide (GaAs) Dynamic Random Access Memory (DRAM). This thesis presents the redesigned six-layer printed circuit test fixture and the design of the DRAM hold down clamp necessary to affix the DRAM to the test fixture. The use of commercially available Computer Aided Design (CAD) and Computer Aided Manufacturing CAM) tools were used for layout and fabrication. Finally, the assembly and testing of the test fixture, as well as problems encountered during the redesign, fabrication, and assembly processes, are discussed. 2013-04-26T18:58:39Z 2013-04-26T18:58:39Z 1994-12 Thesis http://hdl.handle.net/10945/30816 en_US This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, it may not be copyrighted. Monterey, California. Naval Postgraduate School
collection NDLTD
language en_US
sources NDLTD
description The goal of this project is to redesign, fabricate, and assemble a digital circuit operating near a frequency of 250 MHz to test a new experimental Gallium Arsenide (GaAs) Dynamic Random Access Memory (DRAM). This thesis presents the redesigned six-layer printed circuit test fixture and the design of the DRAM hold down clamp necessary to affix the DRAM to the test fixture. The use of commercially available Computer Aided Design (CAD) and Computer Aided Manufacturing CAM) tools were used for layout and fabrication. Finally, the assembly and testing of the test fixture, as well as problems encountered during the redesign, fabrication, and assembly processes, are discussed.
author2 Fouts, Douglas J.
author_facet Fouts, Douglas J.
Ginter, Byron A.
author Ginter, Byron A.
spellingShingle Ginter, Byron A.
Design, fabrication, and assembly of a test platform for a high-speed GaAs DRAM VLSI IC
author_sort Ginter, Byron A.
title Design, fabrication, and assembly of a test platform for a high-speed GaAs DRAM VLSI IC
title_short Design, fabrication, and assembly of a test platform for a high-speed GaAs DRAM VLSI IC
title_full Design, fabrication, and assembly of a test platform for a high-speed GaAs DRAM VLSI IC
title_fullStr Design, fabrication, and assembly of a test platform for a high-speed GaAs DRAM VLSI IC
title_full_unstemmed Design, fabrication, and assembly of a test platform for a high-speed GaAs DRAM VLSI IC
title_sort design, fabrication, and assembly of a test platform for a high-speed gaas dram vlsi ic
publisher Monterey, California. Naval Postgraduate School
publishDate 2013
url http://hdl.handle.net/10945/30816
work_keys_str_mv AT ginterbyrona designfabricationandassemblyofatestplatformforahighspeedgaasdramvlsiic
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