Design and simulation of an ultra reliable fault tolerant computing system voter and interstage.
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Online Access: | http://hdl.handle.net/10945/21777 |
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ndltd-nps.edu-oai-calhoun.nps.edu-10945-217772014-11-27T16:14:30Z Design and simulation of an ultra reliable fault tolerant computing system voter and interstage. Spurlock, Virgil K. NA NA NA NA 2012-11-27T00:16:06Z 2012-11-27T00:16:06Z 1986 Thesis http://hdl.handle.net/10945/21777 ocn641007795 en_US |
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NDLTD |
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en_US |
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NDLTD |
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NA Spurlock, Virgil K. |
author |
Spurlock, Virgil K. |
spellingShingle |
Spurlock, Virgil K. Design and simulation of an ultra reliable fault tolerant computing system voter and interstage. |
author_sort |
Spurlock, Virgil K. |
title |
Design and simulation of an ultra reliable fault tolerant computing system voter and interstage. |
title_short |
Design and simulation of an ultra reliable fault tolerant computing system voter and interstage. |
title_full |
Design and simulation of an ultra reliable fault tolerant computing system voter and interstage. |
title_fullStr |
Design and simulation of an ultra reliable fault tolerant computing system voter and interstage. |
title_full_unstemmed |
Design and simulation of an ultra reliable fault tolerant computing system voter and interstage. |
title_sort |
design and simulation of an ultra reliable fault tolerant computing system voter and interstage. |
publishDate |
2012 |
url |
http://hdl.handle.net/10945/21777 |
work_keys_str_mv |
AT spurlockvirgilk designandsimulationofanultrareliablefaulttolerantcomputingsystemvoterandinterstage |
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1716723874993799168 |