User Logic Development for The Muon Identifier's Common Readout Unit for the ALICE Experiment at The Large Hadron Collider

The Large Hadron Collider at CERN is set to undergo major upgrades starting in 2019 resulting in expected centre of mass energy for proton-proton collisions to be the nominal 14 TeV. In light of these upgrades the experiments, namely, ALICE, ATLAS, CMS and LHCB, are required to upgrade their detecto...

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Bibliographic Details
Main Author: Boyles, Nathan
Other Authors: Buthelezi, Zinhle
Format: Dissertation
Language:English
Published: Faculty of Engineering and the Built Environment 2021
Subjects:
Online Access:http://hdl.handle.net/11427/33445
Description
Summary:The Large Hadron Collider at CERN is set to undergo major upgrades starting in 2019 resulting in expected centre of mass energy for proton-proton collisions to be the nominal 14 TeV. In light of these upgrades the experiments, namely, ALICE, ATLAS, CMS and LHCB, are required to upgrade their detectors correspondingly. The work contained in this dissertation pertains to the upgrade of the ALICE detector and in particular to the Muon Trigger(MTR) Detector which will be renamed the Muon Identifier (MID). This detector has historically operated in triggered readout manner exchanging trigger signals with the Central Trigger Processor (CTP) when events of interest occur using a minimum bias. The upgrades include a transition from triggered readout to continuous readout time delimiting data payloads using periodic heartbeat signals. Continuous readout however results in data rates several orders of magnitude higher than previous operstion and as such would require vast storage resources for raw data thus a new computing system known as O2 is also being developed for real-time data reduction. Part of the system used to perform real-time data reduction is based on FPGA technology and is known as the Common Readout Unit. As its name implies, the CRU is common to many detectors regardless of their differences in design. As such, each detector requires customer logic to meet their unique requirements, known as the user logic. This project concerns development of the ALICE MID user logic which will interface to the Core CRU firmware and perform real-time data extraction, reformatting, zero suppression, data synchronization and transmission of the processed data to the Core CRU firmware. It presents the development of a conceptual design and a prototype for the user logic of the ALICE MID. The research methodology employed involved the identification of relevant documentation as well as in-depth meetings with the developers of the periphery systems to ascertain requirements and constraints of the project. The resulting prototype shows the ability to meet the established requirements in effective and optimized manner. Additionally, the modular design approach employed, allows for more features to be easily introduced.