DAGDA Decoupling Address Generation from Loads and Stores
DAGDA exposes some of the hidden operations that the hardware uses when performing loads and stores to the compiler to save energy and increase performance. We decouple the micro-operations for loads and stores into two operations: the first, the "prepare to access memory" instruction, or...
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| Format: | Others |
| Language: | English English |
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Florida State University
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| Online Access: | http://purl.flvc.org/fsu/fd/2018_Su_Stokes_fsu_0071N_14269 |
| Summary: | DAGDA exposes some of the hidden operations that the hardware uses when performing loads and stores to the compiler to save energy and increase performance. We decouple the micro-operations for loads and stores into two operations: the first, the "prepare to access memory" instruction, or "pam", checks to see if a line is resident in the L1 DC and determines its way in the L1 DC data array, if it exists. The second operations performs the actual data access. This allows us to both save energy using compiler optimization techniques and improve performance because "pam" operations are a natural way of prefetching data into the L1 DC === A Thesis submitted to the Department of Computer Science in partial fulfillment of the requirements for the degree of Master of Science. === Summer Semester 2018. === May 4, 2018. === Includes bibliographical references. === David B. Whalley, Professor Directing Thesis; Xiuwen Liu, Committee Member; Gary Tyson, Committee Member. |
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