Real-Time Switched Reluctance Machine Emulation via Magnetic Equivalent Circuits

• Other Authors: Fleming, Fletcher (authoraut)
• Format: Others
• Language: English; English
• Published: Florida State University
• Subjects: Electrical engineering; Computer engineering
• Online Access: http://purl.flvc.org/fsu/fd/FSU_migr_etd-8987

Electrical power systems utilizing electromagnetic devices, namely those of electrical ships, are subject to nonlinearities from regenerative loads, distributed energy storage systems, and onboard loads such as air handling and fluid pumps. Thus, accurate and timely electromagnetic (EM) device models are required in order to fully assess the impact of such transient and/or nonlinear activity. Specifically, by exploiting an often overlooked technique, i.e. the magnetic equivalent circuit (MEC) modeling method, a solution of adequate granularity for the EM device may be attained while still obeying a faster time commitment when compared to the simulation standard for EM devices, the finite element analysis (FEA) technique. The Hardware in the Loop (HIL) concept synergizes with expedient modeling methods, potentially allowing a wider range of dynamics to be observed in large scale simulations or even tested hardware systems. By scaling down the next generation all electric ships integrated power system (NGIPS) to a power level suitable for an academic laboratory environment, the nonlinear effects of EM devices may be investigated via the HIL concept and the MEC modeling method, given that the runtime is acceptable. This work proposes to develop a novel "real time" MEC (RT MEC) machine model, to ensure the aforementioned runtime. A switched reluctance machine (SRM) is used as a case study device due to both its inherent nonlinearity and it providing an ideal foundation for incorporating various characteristics of the MEC modeling technique. The proposed RT MEC concept will be implemented on a field programmable gate array (FPGA). The advantages of FPGA realization include the inherently parallel nature, a substantially cheaper real time (RT) platform when compared to computationally efficient FEA methods that require dedicated, elaborate resources and application specific hardware. Furthermore, FPGA realization provides a fully customizable solution in terms of numerical methods, time step, HIL interfacing and system expansion. The primary contribution of this work is the RT MEC methodology; more specifically, a high fidelity, real time platform exploited for dynamic SRM modeling, an undoubtedly nonlinear device. RT-MEC contributes higher accuracy and lighter computational loads when compared to commercially available modeling techniques adhering to similar time constraints; ultimately, this yields faster simulation times and more accurate HIL simulation or Power Hardware in the Loop (PHIL) emulations. Further exercising the RT MEC concept, a variety of novel applications can arise that are uniquely capable of accentuating the nonlinear intricacies and effects assimilated into machine connected systems. Expanding, RT MEC can provide a state of the art tool useful for assessing overall system impact when subjected to electromechanical transients, control strategies and power electronics; providing pertinence and merit to the principal contribution. Potential applications include investigating the nonlinear effects of loading the NGIPS via a PHIL implementation, emulated via SRM winding pulses or utilizing SRM RT MEC models with large scale wind system simulations to study the impact an SRM motor type has on wind farm design. === A Dissertation submitted to the Department of Electrical and Computer Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy. === Summer Semester, 2014. === July 17, 2014. === Differential Model, Hardware-in-the-loop, Magnetic Equivalent Circuit, Model reduced, Real-time, Switched Reluctance Machine === Includes bibliographical references. === Chris S. Edrington, Professor Directing Dissertation; Juan Ordonez, University Representative; Simon Foo, Committee Member; Uwe Meyer-Baese, Committee Member; Mark H. Weatherspoon, Committee Member.