GBAW for logic synthesis and circuit partitioning.

• Other Authors: Ho, Chi Kit.
• Format: Others
• Language: English; Chinese
• Published: 2006
• Subjects: Logic circuits > Computer-aided design; Logic design > Data processing
• Online Access: http://library.cuhk.edu.hk/record=b5892784; http://repository.lib.cuhk.edu.hk/en/item/cuhk-325501

Ho Chi Kit. === Thesis submitted in: September 2005. === Thesis (M.Phil.)--Chinese University of Hong Kong, 2006. === Includes bibliographical references (leaves 66-70). === Abstracts in English and Chinese. === Chapter 1 --- Introduction --- p.9 === Chapter 1.1 --- Aims and Contribution --- p.9 === Chapter 1.2 --- Dissertation Overview --- p.10 === Chapter 2 --- Literature Review --- p.11 === Chapter 2.1 --- ATPG-based Alternative Wiring --- p.11 === Chapter 2.1.1 --- Post-Layout Logic Restructuring for Performance Optimization --- p.11 === Chapter 2.1.2 --- Timing Optimization by an Improved Redundancy Addition and Removal Technique --- p.12 === Chapter 2.2 --- Logic Synthesis --- p.13 === Chapter 2.2.1 --- Local Logic Substitution Algorithm for Post-Layout Re-synthesis --- p.13 === Chapter 2.2.2 --- SIS: A System for Sequential Circuit Synthesis --- p.13 === Chapter 2.3 --- Fanout Optimization --- p.14 === Chapter 2.3.1 --- Efficient Global Fanout Optimization Algorithms --- p.14 === Chapter 2.3.2 --- Fanout Optimization under a Submicron Transistor-Level Delay Model --- p.15 === Chapter 2.4 --- Genetic Algorithm --- p.15 === Chapter 2.4.1 --- Scalability and Efficiency of Genetic Algorithms for Geometrical Applications --- p.15 === Chapter 2.4.2 --- "The Gambler's Ruin Problem, Genetic Algorithms, and the Sizing of Populations" --- p.16 === Chapter 3 --- Background --- p.18 === Chapter 3.1 --- Redundancy Addition and Removal --- p.18 === Chapter 3.2 --- REWIRE --- p.19 === Chapter 4 --- Standard Cell Logic Synthesis --- p.20 === Chapter 4.1 --- Introduction --- p.20 === Chapter 4.2 --- Objective --- p.22 === Chapter 4.3 --- Use Standard Patterns for Logic Synthesis --- p.22 === Chapter 4.4 --- Optimization --- p.25 === Chapter 4.5 --- Proposed Scheme --- p.26 === Chapter 4.6 --- Criteria for Selection of Wire --- p.28 === Chapter 4.7 --- Experimental Results --- p.30 === Chapter 4.8 --- Conclusion --- p.34 === Chapter 5 --- Theory on GBAW --- p.35 === Chapter 5.1 --- Introduction --- p.35 === Chapter 5.2 --- Notations and Definitions --- p.36 === Chapter 5.3 --- Minimality and Duality --- p.37 === Chapter 5.4 --- Topological Property of GBAW patterns --- p.41 === Chapter 5.5 --- Experimental Results --- p.47 === Chapter 5.6 --- Conclusion --- p.51 === Chapter 6 --- Multi-way GBAW Partitioning Scheme --- p.52 === Chapter 6.1 --- Introduction --- p.52 === Chapter 6.2 --- Algorithm of GBAW Partitioning Scheme --- p.55 === Chapter 6.3 --- Experimental Results --- p.56 === Chapter 6.4 --- Conclusion --- p.63 === Chapter 7 --- Conclusion --- p.64 === Bibliography --- p.66