Application-specific instruction set processor for speech recognition.

• Other Authors: Cheung, Man Ting.
• Format: Others
• Language: English; Chinese
• Published: 2005
• Subjects: Automatic speech recognition; Computer architecture; Signal processing > Digital techniques
• Online Access: http://library.cuhk.edu.hk/record=b5892381; http://repository.lib.cuhk.edu.hk/en/item/cuhk-325166

Cheung Man Ting. === Thesis (M.Phil.)--Chinese University of Hong Kong, 2005. === Includes bibliographical references (leaves 69-71). === Abstracts in English and Chinese. === Chapter 1 --- Introduction --- p.1 === Chapter 1.1 --- The Emergence of ASIP --- p.1 === Chapter 1.1.1 --- Related Work --- p.3 === Chapter 1.2 --- Motivation --- p.6 === Chapter 1.3 --- ASIP Design Methodologies --- p.7 === Chapter 1.4 --- Fundamentals of Speech Recognition --- p.8 === Chapter 1.5 --- Thesis outline --- p.10 === Chapter 2 --- Automatic Speech Recognition --- p.11 === Chapter 2.1 --- Overview of ASR system --- p.11 === Chapter 2.2 --- Theory of Front-end Feature Extraction --- p.12 === Chapter 2.3 --- Theory of HMM-based Speech Recognition --- p.14 === Chapter 2.3.1 --- Hidden Markov Model (HMM) --- p.14 === Chapter 2.3.2 --- The Typical Structure of the HMM --- p.14 === Chapter 2.3.3 --- Discrete HMMs and Continuous HMMs --- p.15 === Chapter 2.3.4 --- The Three Basic Problems for HMMs --- p.17 === Chapter 2.3.5 --- Probability Evaluation --- p.18 === Chapter 2.4 --- The Viterbi Search Engine --- p.19 === Chapter 2.5 --- Isolated Word Recognition (IWR) --- p.22 === Chapter 3 --- Design of ASIP Platform --- p.24 === Chapter 3.1 --- Instruction Fetch --- p.25 === Chapter 3.2 --- Instruction Decode --- p.26 === Chapter 3.3 --- Datapath --- p.29 === Chapter 3.4 --- Register File Systems --- p.30 === Chapter 3.4.1 --- Memory Hierarchy --- p.30 === Chapter 3.4.2 --- Register File Organization --- p.31 === Chapter 3.4.3 --- Special Registers --- p.34 === Chapter 3.4.4 --- Address Generation --- p.34 === Chapter 3.4.5 --- Load and Store --- p.36 === Chapter 4 --- Implementation of Speech Recognition on ASIP --- p.37 === Chapter 4.1 --- Hardware Architecture Exploration --- p.37 === Chapter 4.1.1 --- Floating Point and Fixed Point --- p.37 === Chapter 4.1.2 --- Multiplication and Accumulation --- p.38 === Chapter 4.1.3 --- Pipelining --- p.41 === Chapter 4.1.4 --- Memory Architecture --- p.43 === Chapter 4.1.5 --- Saturation Logic --- p.44 === Chapter 4.1.6 --- Specialized Addressing Modes --- p.44 === Chapter 4.1.7 --- Repetitive Operation --- p.47 === Chapter 4.2 --- Software Algorithm Implementation --- p.49 === Chapter 4.2.1 --- Implementation Using Base Instruction Set --- p.49 === Chapter 4.2.2 --- Implementation Using Refined Instruction Set --- p.54 === Chapter 5 --- Simulation Results --- p.56 === Chapter 6 --- Conclusions and Future Work --- p.60 === Appendices --- p.62 === Chapter A --- Base Instruction Set --- p.62 === Chapter B --- Special Registers --- p.65 === Chapter C --- Chip Microphotograph of ASIP --- p.67 === Chapter D --- The Testing Board of ASIP --- p.68 === Bibliography --- p.69