An asynchronous DES in contactless smartcard.

• Other Authors: Siu, Pui-Lam.
• Format: Others
• Language: English; Chinese
• Published: 2004
• Subjects: Smart cards; Data encryption (Computer science); Cryptography
• Online Access: http://library.cuhk.edu.hk/record=b5891905; http://repository.lib.cuhk.edu.hk/en/item/cuhk-324700

Siu, Pui-Lam. === Thesis submitted in: August 2003. === Thesis (M.Phil.)--Chinese University of Hong Kong, 2004. === Includes bibliographical references (leaves 104-109). === Abstracts in English and Chinese. === list of figures --- p.5 === list of tables --- p.7 === acknowledgements --- p.8 === abstract --- p.9 === Chapter 1. --- introduction --- p.12 === Chapter 1.1 --- Smart Card --- p.12 === Chapter 1.1.1 --- What is a smart card? --- p.12 === Chapter 1.1.2 --- How is a smart card different from the magnetic stripe card that I carry in my wallet? --- p.13 === Chapter 1.1.3 --- Why are interoperability and enforced standards crucial to widespread adoption of smart cards? --- p.13 === Chapter 1.1.4 --- Contact vs Contactless --- p.14 === Chapter 1.1.5 --- How secure and confidential contactless smart cards are? --- p.14 === Chapter 1.1.6 --- Contactless Smart Card Application Contactless smart cards are widely used in commercial fields as stored-value and secure storage cards --- p.14 === Chapter 1.1.7 --- What are the major benefits that Contactless smart cards offer to consumers? --- p.16 === Chapter 1.2 --- Design Motivation --- p.16 === Chapter 1.3 --- RF Part Interface --- p.17 === Chapter 1.4 --- Potential Advantages of Using Asynchronous Circuit --- p.19 === Chapter 1.5 --- Design Methodology for Asynchronous Circuit --- p.23 === Chapter 1.5.1 --- Difficulty and limitation of asynchronous design --- p.27 === Chapter 1.5.2 --- Asynchronous pipeline --- p.28 === Chapter 2. --- background theory --- p.32 === Chapter 2.1 --- Description of DES --- p.32 === Chapter 2.1.1 --- Outline of the Algorithm --- p.33 === Chapter 2.1.2 --- Initial Permutation --- p.35 === Chapter 2.1.3 --- Key Transformation --- p.35 === Chapter 2.1.4 --- Expansion Permutation --- p.37 === Chapter 2.1.5 --- S-box Substitution --- p.38 === Chapter 2.1.6 --- P-Box Permutation --- p.41 === Chapter 2.1.7 --- Final Permutation --- p.42 === Chapter 2.1.8 --- Decrypting DES --- p.43 === Chapter 2.1.9 --- Security of DES --- p.43 === Chapter 2.1.10 --- Weak Keys --- p.43 === Chapter 2.1.11 --- Algebraic Structure --- p.46 === Chapter 2.1.12 --- Key Length --- p.46 === Chapter 2.1.13 --- Number of Rounds --- p.48 === Chapter 2.1.14 --- Design of the S-Boxes --- p.48 === Chapter 3. --- rf part --- p.50 === Chapter 3.1 --- Power On --- p.51 === Chapter 3.2 --- Power Induction --- p.52 === Chapter 3.3 --- Limiter and Regulator --- p.54 === Chapter 3.4 --- Demodulation --- p.56 === Chapter 3.5 --- Modulation --- p.57 === Chapter 4. --- asynchronous circuit theory --- p.58 === Chapter 4.1 --- Potential Problem of Classical Asynchronous Pipeline --- p.58 === Chapter 4.2 --- The New Handshake Cell --- p.58 === Chapter 4.3 --- The Modified Asynchronous Pipeline Architecture --- p.60 === Chapter 4.4 --- Asynchronous Circuit Comparison --- p.65 === Chapter 5 --- implementation --- p.67 === Chapter 5.1 --- DES Implementation --- p.67 === Chapter 5.1.1 --- Power estimation of the asynchronous DES --- p.70 === Chapter 5.1.2 --- Modified Circuit --- p.73 === Type One --- p.73 === Type two --- p.76 === Chapter 5.1.3 --- Interface --- p.79 === Chapter 5.1.4 --- Shift Unit --- p.80 === Chapter 5.1.5 --- Multiplexer Unit --- p.82 === Chapter 5.1.6 --- Compression Unit --- p.83 === Chapter 5.1.7 --- Expansion Unit --- p.84 === Chapter 5.1.8 --- Xor Unit --- p.85 === Chapter 5.1.9 --- S_box Unit --- p.86 === Chapter 5.1.10 --- P-box unit --- p.88 === Chapter 5.1.11 --- Latch unit --- p.89 === Chapter 5.1.12 --- Transmission Unit --- p.90 === Chapter 5.2 --- Floor Plan Design --- p.90 === Chapter 6. --- result and discussion --- p.93 === Chapter 6.1 --- Simulation Result --- p.93 === Chapter 6.2 --- Measurement --- p.97 === Chapter 6.3 --- Comparison --- p.101 === Chapter 6.4 --- Conclusion --- p.101 === Chapter 7. --- reference --- p.104 === Chapter 8. --- appendix --- p.110 === Chapter 8.1 --- RF Part Implementation --- p.110 === Chapter 8.1.1 --- Full wave rectifying circuit --- p.110 === Chapter 8.1.2 --- "Limiting Circuit," --- p.111 === Chapter 8.1.3 --- Regulator circuit --- p.113 === Chapter 8.1.4 --- Demodulation circuit --- p.113 === Chapter 8.1.5 --- Simulation of the RF part --- p.115 === Chapter 8.2 --- New Technology for Designing a RF Interface --- p.117 === Chapter 8.2 --- Block Diagrams --- p.118