Performance analysis of iterative matching scheduling algorithms in ATM input-buffered switches.
by Cheng Sze Wan. === Thesis (M.Phil.)--Chinese University of Hong Kong, 1999. === Includes bibliographical references (leaves 72-[76]). === Abstracts in English and Chinese. === Chapter 1 --- Introduction --- p.1 === Chapter 1.1 --- Background --- p.1 === Chapter 1.2 --- Traffic Scheduling in Inp...
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| Format: | Others |
| Language: | English Chinese |
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1999
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| Online Access: | http://library.cuhk.edu.hk/record=b5889961 http://repository.lib.cuhk.edu.hk/en/item/cuhk-322621 |
| Summary: | by Cheng Sze Wan. === Thesis (M.Phil.)--Chinese University of Hong Kong, 1999. === Includes bibliographical references (leaves 72-[76]). === Abstracts in English and Chinese. === Chapter 1 --- Introduction --- p.1 === Chapter 1.1 --- Background --- p.1 === Chapter 1.2 --- Traffic Scheduling in Input-buffered Switches .。 --- p.3 === Chapter 1.3 --- Organization of Thesis --- p.7 === Chapter 2 --- Principle of Enchanced PIM Algorithm --- p.8 === Chapter 2.1 --- Introduction --- p.8 === Chapter 2.1.1 --- Switch Model --- p.9 === Chapter 2.2 --- Enhanced Parallel Iterative Matching Algorithm (EPIM) --- p.10 === Chapter 2.2.1 --- Motivation --- p.10 === Chapter 2.2.2 --- Algorithm --- p.12 === Chapter 2.3 --- Performance Evaluation --- p.16 === Chapter 2.3.1 --- Simulation --- p.16 === Chapter 2.3.2 --- Delay Analysis --- p.18 === Chapter 3 --- Providing Bandwidth Guarantee in Input-Buffered Switches --- p.25 === Chapter 3.1 --- Introduction --- p.25 === Chapter 3.2 --- Bandwidth Reservation in Static Scheduling Algorithm --- p.26 === Chapter 3.3 --- Incorporation of Dynamic and Static Scheduling Algorithms .。 --- p.32 === Chapter 3.4 --- Simulation --- p.34 === Chapter 3.4.1 --- Switch Model --- p.35 === Chapter 3.4.2 --- Simulation Results --- p.36 === Chapter 3.5 --- Comparison with Existing Schemes --- p.42 === Chapter 3.5.1 --- Statistical Matching --- p.42 === Chapter 3.5.2 --- Weighted Probabilistic Iterative Matching --- p.45 === Chapter 4 --- EPIM and Cross-Path Switch --- p.50 === Chapter 4.1 --- Introduction --- p.50 === Chapter 4.2 --- Concept of Cross-Path Switching --- p.51 === Chapter 4.2.1 --- Principle --- p.51 === Chapter 4.2.2 --- Supporting Performance Guarantee in Cross-Path Switch --- p.52 === Chapter 4.3 --- Implication of EPIM on Cross-Path switch --- p.55 === Chapter 4.3.1 --- Problem Re-definition --- p.55 === Chapter 4.3.2 --- Scheduling in Input Modules with EPIM --- p.58 === Chapter 4.4 --- Simulation --- p.63 === Chapter 5 --- Conclusion --- p.70 === Bibliography --- p.72 |
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