Development of parallel digital circuits and computation of the Dynostat algorithm

A synthesis of a ‘machine word’ mathematical formulation for binary two’s complement arithmetic provides a common basis for understanding existing algorithms and circuits for the implementation of common arithmetic operations in digital simulation. A systematic application of the machine word approa...

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Bibliographic Details
Main Author: Gibbard, R. W.
Language:en
Published: University of Canterbury. Electrical Engineering 2011
Online Access:http://hdl.handle.net/10092/6029
Description
Summary:A synthesis of a ‘machine word’ mathematical formulation for binary two’s complement arithmetic provides a common basis for understanding existing algorithms and circuits for the implementation of common arithmetic operations in digital simulation. A systematic application of the machine word approach yields unified algorithm formulations and circuit schematics including contributions to new knowledge, particularly in parallel array multiplications. From comparisons with existing formulations and circuits, the relative merits of the machine word approach are elucidated. The development of a prototype parallel digital (P.D.) optimiser, incorporating results from the circuits study, provides special purpose equipment which is superior in speed to existing resistor-capacitor shaped (RC) analogue computers. Comparative performance data is provided by simple Linear Programming examples, solved in earlier research using RC-analogue equipment. Also solve is the static section of an illustrative example of optimal resource allocation using a Dynostat approach. An extended performance assessment to dynamic optimisation, in which the P.D. machine supplies solutions of the algebraic (static) section of the problem to a serial-digital (S.D.) computer carrying out dynamic programming calculations (the dynamic section of Dynostat), demonstrates the efficiency of an all digital solution of a problem solved previously by a hybrid RC-analogue – S.D. computation. The satisfactory results suggest the desirability of such high speed digital machines for general application to problems and on-line situations in which inherent disadvantages of inaccuracy and maintainability of RC-analogue machines are important restrictions. Zero-zone functional representations of algebraic restraints are used throughout the mathematical formulations and circuit designs for the P.D. machine. A preliminary contribution resulting from the extension of the zero-zone function concept to dynamic restrains is included in an appendix.