Formal verification and controller synthesis for discrete-time systems
Thesis (Ph.D.)--Boston University === Temporal logics, such as Computation Tree Logic (CTL) and Linear Temporal Logic (LTL), are customarily used to specify the correctness of computer programs and digital circuits modeled as finite-state transition systems. In recent years, due to their expressivit...
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| Language: | en_US |
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Boston University
2015
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| Online Access: | https://hdl.handle.net/2144/10934 |