The design, fabrication and measurement of asymmetric LDD transistors

• Main Author: Smith, Robin C.
• Published: University of Edinburgh 1994
• Subjects: 621.3
• Online Access: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.662077

This thesis describes the design fabrication, measurement and analysis of asymmetric lightly doped drain transistors. The transistors were fabricated so that adjacent transistors in columns were of a slightly different but determinable asymmetry. This approach has been termed the progressional offset technique. The progressional offset technique has the advantage in that it can be used to fabricate transistors with different lightly doped drain lengths the same wafer. The resulting devices consist of a range of transistors with different degrees of asymmetry which can be quantified. The thesis shows that the asymmetry of these devices can be determined by simple electrical measurements. The progressional offset technique was used to show that an asymmetric lightly doped drain implant can have a large effect on the electrical properties of the devices. This occurs when the lightly doped drain implant is shadowed by the polysilicon gate during the angled implantation which is routinely used by industry. The progressional offset technique is a useful tool for analysing the effects of asymmetry on LDD transistors. It also has been shown to produce transistors with different LDD lengths on a single wafer.