Self-timed field programmmable gate array architectures
Virtual hardware exploits the dynamic reconfigurability of Field Programmable Gate Arrays (FPGAs), but is currently limited by the delay properties of synchronous FPGA architectures. Synchronous circuits are difficult to manipulate dynamically, since this alters their internal delays. The speed-inde...
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University of Edinburgh
1997
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| Online Access: | http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.660469 |