Pulse stream VLSI circuits and techniques for the implementation of neural networks
The recent dramatic increase in research activity in the study of artificial neural networks has resulted in nonlinear systems that are capable of tasks such as classification, optimisation and content addressable memory. These successes, together with the desire to understand and mimic biological n...
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ndltd-bl.uk-oai-ethos.bl.uk-6520062016-04-25T15:16:57ZPulse stream VLSI circuits and techniques for the implementation of neural networksHamilton, Alister1993The recent dramatic increase in research activity in the study of artificial neural networks has resulted in nonlinear systems that are capable of tasks such as classification, optimisation and content addressable memory. These successes, together with the desire to understand and mimic biological neural systems, have led to interest in the implementation of neural networks in both analogue and digital VLSI. This thesis describes the pulse stream methodology for signalling, arithmetic and communication in VLSI neural networks. A review of conventional VLSI implementations of neural networks by case study highlights the significant contributions to date in the areas of digital, mixed signal and analogue neural networks. A review of pulsed VLSI implementations of neural networks highlights research activity that is most closely related to that contained within this thesis. Several pulse stream neuron and synapse circuits have been developed and implemented in VLSI to test their operation. Methods for communicating neural state information between chips have been developed and implemented. The use of automatic set up procedures for analogue VLSI circuits are seen as essential to the development of large pulse stream neural networks and have been investigated. These circuits comprise <i>The Edinburgh Pulse Stream Cell Library</i>. The experience gained in developing this cell library has resulted in the development of a large pulse stream neural network chip, EPSILON (Edinburgh's Pulse Stream Implementation of a Learning Oriented Network), which has been demonstrated solving vowel recognition using <i>real world</i> data. A recommendation for the use of pulse stream circuits for various categories of neural network based on cells presented in this thesis has been made and forms the main contribution to knowledge of this work.621.3University of Edinburghhttp://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.652006http://hdl.handle.net/1842/13990Electronic Thesis or Dissertation |
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621.3 Hamilton, Alister Pulse stream VLSI circuits and techniques for the implementation of neural networks |
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The recent dramatic increase in research activity in the study of artificial neural networks has resulted in nonlinear systems that are capable of tasks such as classification, optimisation and content addressable memory. These successes, together with the desire to understand and mimic biological neural systems, have led to interest in the implementation of neural networks in both analogue and digital VLSI. This thesis describes the pulse stream methodology for signalling, arithmetic and communication in VLSI neural networks. A review of conventional VLSI implementations of neural networks by case study highlights the significant contributions to date in the areas of digital, mixed signal and analogue neural networks. A review of pulsed VLSI implementations of neural networks highlights research activity that is most closely related to that contained within this thesis. Several pulse stream neuron and synapse circuits have been developed and implemented in VLSI to test their operation. Methods for communicating neural state information between chips have been developed and implemented. The use of automatic set up procedures for analogue VLSI circuits are seen as essential to the development of large pulse stream neural networks and have been investigated. These circuits comprise <i>The Edinburgh Pulse Stream Cell Library</i>. The experience gained in developing this cell library has resulted in the development of a large pulse stream neural network chip, EPSILON (Edinburgh's Pulse Stream Implementation of a Learning Oriented Network), which has been demonstrated solving vowel recognition using <i>real world</i> data. A recommendation for the use of pulse stream circuits for various categories of neural network based on cells presented in this thesis has been made and forms the main contribution to knowledge of this work. |
author |
Hamilton, Alister |
author_facet |
Hamilton, Alister |
author_sort |
Hamilton, Alister |
title |
Pulse stream VLSI circuits and techniques for the implementation of neural networks |
title_short |
Pulse stream VLSI circuits and techniques for the implementation of neural networks |
title_full |
Pulse stream VLSI circuits and techniques for the implementation of neural networks |
title_fullStr |
Pulse stream VLSI circuits and techniques for the implementation of neural networks |
title_full_unstemmed |
Pulse stream VLSI circuits and techniques for the implementation of neural networks |
title_sort |
pulse stream vlsi circuits and techniques for the implementation of neural networks |
publisher |
University of Edinburgh |
publishDate |
1993 |
url |
http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.652006 |
work_keys_str_mv |
AT hamiltonalister pulsestreamvlsicircuitsandtechniquesfortheimplementationofneuralnetworks |
_version_ |
1718234561823899648 |