Distributed majority carrier effects in semiconductor device structures

This thesis presents a study of distributed majority carrier effects in semiconductor device structures by simulation techniques. Some background material on the theory of finite-difference approximation, essential to simulation work, are given. High-frequency terminal measurements on a diffusion tr...

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Main Author: Dutta Roy, Amitava
Published: Imperial College London 1968
Subjects:
Online Access:https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.623005
id ndltd-bl.uk-oai-ethos.bl.uk-623005
record_format oai_dc
spelling ndltd-bl.uk-oai-ethos.bl.uk-6230052019-02-27T03:26:57ZDistributed majority carrier effects in semiconductor device structuresDutta Roy, Amitava1968This thesis presents a study of distributed majority carrier effects in semiconductor device structures by simulation techniques. Some background material on the theory of finite-difference approximation, essential to simulation work, are given. High-frequency terminal measurements on a diffusion transistor are carried out, the range of frequencies being such that the majority carrier flow dominates the device performance. A passive RCL analogue of the base-region of a transistor is constructed in which parasitics such as lead-inductances are simulated. Measurements show a qualitative similarity of the frequency-variation of the input immittances of the analogue and of the real device. This demonstrates the nature and magnitude of the effect of parasitics on the determination of extrinsic elements. The procedure is then extended to the simulation of the frequency response of distributed RC structures of different shapes by a finite number of lumped components. The transient response of linear and nonlinear semiconductor RC structures is also studied. Results for linear networks are confirmed by measurements on real devices. Par the nonlinear networks, different types of PN junction capacitance have been considered. The effect of a nonlinear structure on the time parameters of pulse is investigated in order to determine conditions for maximum delay and minimum risetime. A theoretical possibility of delaying a pulse by the application of an external bias to a chain of metal-oxide-semiconductor transistors has also been explored. The concluding sections contain suggestions for further work.537.5Imperial College Londonhttps://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.623005http://hdl.handle.net/10044/1/15769Electronic Thesis or Dissertation
collection NDLTD
sources NDLTD
topic 537.5
spellingShingle 537.5
Dutta Roy, Amitava
Distributed majority carrier effects in semiconductor device structures
description This thesis presents a study of distributed majority carrier effects in semiconductor device structures by simulation techniques. Some background material on the theory of finite-difference approximation, essential to simulation work, are given. High-frequency terminal measurements on a diffusion transistor are carried out, the range of frequencies being such that the majority carrier flow dominates the device performance. A passive RCL analogue of the base-region of a transistor is constructed in which parasitics such as lead-inductances are simulated. Measurements show a qualitative similarity of the frequency-variation of the input immittances of the analogue and of the real device. This demonstrates the nature and magnitude of the effect of parasitics on the determination of extrinsic elements. The procedure is then extended to the simulation of the frequency response of distributed RC structures of different shapes by a finite number of lumped components. The transient response of linear and nonlinear semiconductor RC structures is also studied. Results for linear networks are confirmed by measurements on real devices. Par the nonlinear networks, different types of PN junction capacitance have been considered. The effect of a nonlinear structure on the time parameters of pulse is investigated in order to determine conditions for maximum delay and minimum risetime. A theoretical possibility of delaying a pulse by the application of an external bias to a chain of metal-oxide-semiconductor transistors has also been explored. The concluding sections contain suggestions for further work.
author Dutta Roy, Amitava
author_facet Dutta Roy, Amitava
author_sort Dutta Roy, Amitava
title Distributed majority carrier effects in semiconductor device structures
title_short Distributed majority carrier effects in semiconductor device structures
title_full Distributed majority carrier effects in semiconductor device structures
title_fullStr Distributed majority carrier effects in semiconductor device structures
title_full_unstemmed Distributed majority carrier effects in semiconductor device structures
title_sort distributed majority carrier effects in semiconductor device structures
publisher Imperial College London
publishDate 1968
url https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.623005
work_keys_str_mv AT duttaroyamitava distributedmajoritycarriereffectsinsemiconductordevicestructures
_version_ 1718984237568229376