| Summary: | The isolation of graphene has generated a great deal of excitement because of its unique properties. From a fundamental physics standpoint the most exciting aspect of the material is its electronic properties. One interesting method available to explore this electronic system is to investigate how the material interacts with superconductors. This interaction has been investigated by several groups via the production of superconductor-graphene superconductor devices, although their observed transport properties have been less than optimal. This thesis explores the factors which can limit the performance of these graphene devices. Suggestions are made regarding possible methods of improving device performance through the optimisation of the fabrication procedures. Graphene field effect transistors are produced using a combination of mechanical exfoliation, lithography and sputtering techniques. These devices are then characterised using a combination of transport and optical measurements. Two annealing methods are explored to reduce the concentration of charged impurities on the samples, using both an existing current annealing technique and a novel annealing technique using an on-chip platinum heater. Quantum Hall effect measurements are performed confirming the high quality of our graphene. Making poor contact to graphene is a possible performance limiter. The transfer length method is used to measure the contact resistance in our devices directly. A large contact resistance is observed, attributed to amorphisation of the underlying graphene by the sputtered material. This is confirmed using Raman spectroscopy. Asymmetry in the electric field measurements are also explained using an existing contact induced doping model. Extension of this model to include alternative doping profiles is shown to improve the fit to data. Measurements of the opto-electronic response of our graphene devices using scanning photocurrent microscopy supports the observation of contact induced doping and carrier density inhomogeneity in graphene devices which can limit device performance.
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