A study of terabit per square inch scanning probe phase change memory

Scanning electrical probe-based storage using phase change materials is considered as a promising data storage technology due to its potential to meet future needs for ultra-high areal density, low-power, non-volatility, and rewritability. It is therefore important to understand and model the write,...

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Bibliographic Details
Main Author: Wang, Lei
Other Authors: Wright, David
Published: University of Exeter 2009
Subjects:
Online Access:http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.545563
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Summary:Scanning electrical probe-based storage using phase change materials is considered as a promising data storage technology due to its potential to meet future needs for ultra-high areal density, low-power, non-volatility, and rewritability. It is therefore important to understand and model the write, read and erase processes of this new technology, so that likely performance limits can be predicted and recording media and recording systems designed. Thus, this thesis presents a theoretical framework and associated computational model for write, read, and erase processes in electrical probe storage on phase change materials (Ge2Sb2Te5). Investigations of the write performance in this thesis are mainly focused on writing crystalline bits in an amorphous background, which is investigated using a parametric approach to assess the role of the electrical, thermal, and thickness properties of the media stack and probe tip on the size and shape of recorded bits, and on the write voltage and power required. In addition, advanced modeling techniques including heterogeneous nucleation, threshold switching, contact resistance and surface roughness are also introduced into the writing simulation in order to mimic more closely a practical recording environment. Based on these investigations, the design of an optimal media stack is proposed, which comprises a thin Ge2Sb2Te5 layer sandwiched by a thin capping layer with fairly high electrical conductivity and low thermal conductivity and a thick underlayer with a high electrical conductivity and fairly low thermal conductivity. Readout performance is evaluated in this thesis by extending the previous 2-D model to 3D, aiming to pursue a realistic read current and understand effects of the noise on the read process. It is found that isolated crystalline bits extending through the amorphous matrix exhibits a better reading contrast than either crystalline bits embedded in the amorphous matrix or amorphous bits on top portion of the crystalline matrix. Isolated amorphous bits on the crystalline matrix give the narrowest read pulse width, the largest peak-peak readout signal, and the least noise effect, but the writing of amorphous bits is difficult due to the high field and temperature in the capping/underlayer. This thesis also investigated the erasure of both crystalline bits and amorphous bits in a scanning probe phase change memory. The amorphous bit in a crystalline matrix can be easily erased (re-crystallized), but the erasing of crystalline bits in an amorphous matrix is problematic and always accompanied by the formation of an unwanted crystalline ‘ring’ surrounding the originally recorded bit. Two novel approaches, i.e. patterned Ge2Sb2Te5 media in an SiO2 matrix and slow ‘growth’ material are proposed in order to overcome such a ‘ring’ effect. It was found that patterned Ge2Sb2Te5 media can entirely remove the ‘ring’, but the thermal conductivity of the capping/underlayer needs to be chosen carefully to avoid high temperature appearing in these two layers. The fabrication of such patterned media on the nanoscale dimensions needed for ultra-high density storage is however problematic. The use of ‘slow-growth’ material improves the erase performance of continuous (i.e. unpatterned) Ge2Sb2Te5 films, but without a complete removal of the ‘ring’. Finally, using the optimized design of media stack and a suitable probe tip the feasibility of writing and reading at an areal density of 10Tbit/inch2 has been demonstrated, with a much lower power/energy (1.08pJ/bit) than in any previous work.