Optimising and evaluating designs for reconfigurable hardware
Growing demand for computational performance, and the rising cost for chip design and manufacturing make reconfigurable hardware increasingly attractive for digital system implementation. Reconfigurable hardware, such as field-programmable gate arrays (FPGAs), can deliver performance through paralle...
Main Author: | Becker, Tobias |
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Other Authors: | Luk, Wayne ; Cheung, Peter |
Published: |
Imperial College London
2011
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Subjects: | |
Online Access: | http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.535987 |
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