The automatic synthesis of fault tolerant and fault secure VLSI systems

This thesis investigates the design of fault tolerant and fault secure (FTFS) systems within the framework of silicon compilation. Automatic design modification is used to introduce FTFS characteristics into a design. A taxonomy of FTFS techniques is introduced and is used to identify a number of fe...

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Main Author: Nixon, Ian Michael
Published: University of Edinburgh 1988
Subjects:
Online Access:http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.381566
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spelling ndltd-bl.uk-oai-ethos.bl.uk-3815662015-03-19T05:22:34ZThe automatic synthesis of fault tolerant and fault secure VLSI systemsNixon, Ian Michael1988This thesis investigates the design of fault tolerant and fault secure (FTFS) systems within the framework of silicon compilation. Automatic design modification is used to introduce FTFS characteristics into a design. A taxonomy of FTFS techniques is introduced and is used to identify a number of features which an "automatic design for FTFS" system should exhibit. A silicon compilation system, Chip Churn 2 (CC2), has been implemented and has been used to demonstrate the feasibility of automatic design of FTFS systems. The CC2 system provides a design language, simulation facilities and a back-end able to produce CMOS VLSI designs. A number of FTFS design methods have been implemented within the CC2 environment; these methods range from triple modular redundancy to concurrent parity code checking. The FTFS design methods can be applied automatically to general designs in order to realise them as FTFS systems. A number of example designs are presented; these are used to illustrate the FTFS modification techniques which have been implemented. Area results for CMOS devices are presented; this allows the modification methods to be compared. A number of problems arising from the methods are highlighted and some solutions suggested.621.3192Fault-tolerant computing : Integrated circuits : FTFS : FTFS design methodsUniversity of Edinburghhttp://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.381566http://hdl.handle.net/1842/6637Electronic Thesis or Dissertation
collection NDLTD
sources NDLTD
topic 621.3192
Fault-tolerant computing : Integrated circuits : FTFS : FTFS design methods
spellingShingle 621.3192
Fault-tolerant computing : Integrated circuits : FTFS : FTFS design methods
Nixon, Ian Michael
The automatic synthesis of fault tolerant and fault secure VLSI systems
description This thesis investigates the design of fault tolerant and fault secure (FTFS) systems within the framework of silicon compilation. Automatic design modification is used to introduce FTFS characteristics into a design. A taxonomy of FTFS techniques is introduced and is used to identify a number of features which an "automatic design for FTFS" system should exhibit. A silicon compilation system, Chip Churn 2 (CC2), has been implemented and has been used to demonstrate the feasibility of automatic design of FTFS systems. The CC2 system provides a design language, simulation facilities and a back-end able to produce CMOS VLSI designs. A number of FTFS design methods have been implemented within the CC2 environment; these methods range from triple modular redundancy to concurrent parity code checking. The FTFS design methods can be applied automatically to general designs in order to realise them as FTFS systems. A number of example designs are presented; these are used to illustrate the FTFS modification techniques which have been implemented. Area results for CMOS devices are presented; this allows the modification methods to be compared. A number of problems arising from the methods are highlighted and some solutions suggested.
author Nixon, Ian Michael
author_facet Nixon, Ian Michael
author_sort Nixon, Ian Michael
title The automatic synthesis of fault tolerant and fault secure VLSI systems
title_short The automatic synthesis of fault tolerant and fault secure VLSI systems
title_full The automatic synthesis of fault tolerant and fault secure VLSI systems
title_fullStr The automatic synthesis of fault tolerant and fault secure VLSI systems
title_full_unstemmed The automatic synthesis of fault tolerant and fault secure VLSI systems
title_sort automatic synthesis of fault tolerant and fault secure vlsi systems
publisher University of Edinburgh
publishDate 1988
url http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.381566
work_keys_str_mv AT nixonianmichael theautomaticsynthesisoffaulttolerantandfaultsecurevlsisystems
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