An investigation into the inherent robustness and optimal harmonic performance of the advanced static var compensator (ASVC)

• Main Author: Holdsworth, Lee
• Other Authors: Putrus, Ghanim
• Published: Northumbria University 2001
• Subjects: 621.319; H600 Electronic and Electrical Engineering
• Online Access: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.343881

For many years, it was generally understood that a.c. transmission systems could not be controlled fast enough to handle dynamic system conditions. The dynamic system problems were usually handled by over-design, which resulted in under utilisation of the system. Flexible AC Transmission System (FACTS) devices play an important role in improving the dynamic performance of a power system and hence achieve better utilisation of the available system. They are principally employed to 'rapidly' control one or more of the three main parameters directly affecting a.c. power transmission, namely the system impedance, magnitude and phase angle of the system voltage. The Voltage Source Inverter (VSI) is the basic building block of most FACTS devices. The multi-level VSI topologies are becoming the favourite power circuits for the 2nd generation of FACTS shunt compensators. The research reported in this thesis is to investigate the reliability of Voltage Source Inverter topologies that are used in high power applications, mainly the Advanced Static VAr Compensator (ASVC). The inherent redundancy of the diode-clamped multi-level VSI topology, with respect to short-circuit and open- circuit device faults, is investigated using a space-vector nodal representation. The harmonic performance of the ASVC under normal and during 'device fault' operating conditions is also investigated. A new multi-level inverter topology is proposed to improve the robustness of the conventional diode-clamped VSI topology. Harmonic spectrum 'recovery' techniques to be utilised in the event of device failure are also investigated and discussed. An adaptive PWM controller is proposed to maintain an acceptable low order harmonic performance for the ASVC under normal and abnormal operating conditions. The results obtained show that the proposed system can maintain uninterrupted operational performance throughout certain device failure conditions. An experimental 3-level discharge path protection switch clamped (DPPSC) VSI system has been designed, constructed and analysed. To demonstrate the 3-level adaptive SHEM strategy, the adaptive DPPS controller was implemented on a TMS320F240 DSP evaluation module (EVM). The results were in good agreement with those predicted in the analytical and simulation parts of the work. The research carried out in this work showed that under loaded operating conditions, the low frequency harmonic components targeted by SHEM techniques are not fully eliminated from the output voltage spectrum. This investigation revealed that this is due to the harmonic interaction between the a.c. and d.c. sides of the multi-level inverter. A new 'Dynamic Selective Harmonic Elimination Modulation (DSHEM)' scheme is proposed to overcome this problem. The DSHEM dynamically adjusts the switching angles according to the system operating point. The proposed method is verified using simulation and the experimental model.