Optimal testing of multilevel logic circuits
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Edinburgh Napier University
1999
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ndltd-bl.uk-oai-ethos.bl.uk-3003272015-03-19T06:53:50ZOptimal testing of multilevel logic circuitsBystrov, Alexandre1999621.3192CircuitsEdinburgh Napier Universityhttp://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.300327Electronic Thesis or Dissertation |
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NDLTD |
sources |
NDLTD |
topic |
621.3192 Circuits |
spellingShingle |
621.3192 Circuits Bystrov, Alexandre Optimal testing of multilevel logic circuits |
author |
Bystrov, Alexandre |
author_facet |
Bystrov, Alexandre |
author_sort |
Bystrov, Alexandre |
title |
Optimal testing of multilevel logic circuits |
title_short |
Optimal testing of multilevel logic circuits |
title_full |
Optimal testing of multilevel logic circuits |
title_fullStr |
Optimal testing of multilevel logic circuits |
title_full_unstemmed |
Optimal testing of multilevel logic circuits |
title_sort |
optimal testing of multilevel logic circuits |
publisher |
Edinburgh Napier University |
publishDate |
1999 |
url |
http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.300327 |
work_keys_str_mv |
AT bystrovalexandre optimaltestingofmultilevellogiccircuits |
_version_ |
1716752967233699840 |