The characterisation and termination of lossless coupled transmission lines for high speed logic circuits
As the speed of logic integrated circuits increases, the effects of the package and the interconnections become more significant. Hybrid technology can be used to eliminate the need for individual packaging of the integrated circuits but now the interconnections are generally closer together and mus...
Main Author: | Scurr, David |
---|---|
Published: |
Loughborough University
1980
|
Subjects: | |
Online Access: | http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.281146 |
Similar Items
-
Optimal testing of multilevel logic circuits
by: Bystrov, Alexandre
Published: (1999) -
Logic programming analysis of asynchronous digital circuits
by: Gaubatz, Donald Almo
Published: (1991) -
Logic circuit testability for reconvergent fan-out nodes
by: Roberts, M. W.
Published: (1986) -
The design of high speed multipliers and their implementation in differential logic
by: Grist, Darren
Published: (2000) -
Formalising an integrated circuit design style in higher order logic
by: Dhingra, Inderpreet Singh
Published: (1988)