Structured test of VLSI arrays
Main Author: | Marnane, William Peter |
---|---|
Published: |
University of Oxford
1989
|
Subjects: | |
Online Access: | http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.238118 |
Similar Items
-
Tunable techniques for robust high frequency analogue VLSI
by: Voo, Thart Fah
Published: (1999) -
Integrated design and test of VLSI regular arrays
by: Evans, Michael Andrew
Published: (1994) -
Design and analysis of computational models for programmable VLSI processor arrays
by: Manning, L. J.
Published: (1988) -
Algorithms to determine the positioning of built-in self-test structures in VLSI circuits with references to an economic model
by: Austwick, Michael Steven
Published: (1989) -
Critical design issues for gallium arsenide VLSI circuits
by: Bushehri, Ebrahim
Published: (1992)