Energy-efficient DSP System Design based on the Redundant Binary Number System

abstract: Redundant Binary (RBR) number representations have been extensively used in the past for high-throughput Digital Signal Processing (DSP) systems. Data-path components based on this number system have smaller critical path delay but larger area compared to conventional two's complement...

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Other Authors: Mahadevan, Rupa (Author)
Format: Dissertation
Language:English
Published: 2011
Subjects:
EDP
Online Access:http://hdl.handle.net/2286/R.I.9463
id ndltd-asu.edu-item-9463
record_format oai_dc
spelling ndltd-asu.edu-item-94632018-06-22T03:02:07Z Energy-efficient DSP System Design based on the Redundant Binary Number System abstract: Redundant Binary (RBR) number representations have been extensively used in the past for high-throughput Digital Signal Processing (DSP) systems. Data-path components based on this number system have smaller critical path delay but larger area compared to conventional two's complement systems. This work explores the use of RBR number representation for implementing high-throughput DSP systems that are also energy-efficient. Data-path components such as adders and multipliers are evaluated with respect to critical path delay, energy and Energy-Delay Product (EDP). A new design for a RBR adder with very good EDP performance has been proposed. The corresponding RBR parallel adder has a much lower critical path delay and EDP compared to two's complement carry select and carry look-ahead adder implementations. Next, several RBR multiplier architectures are investigated and their performance compared to two's complement systems. These include two new multiplier architectures: a purely RBR multiplier where both the operands are in RBR form, and a hybrid multiplier where the multiplicand is in RBR form and the other operand is represented in conventional two's complement form. Both the RBR and hybrid designs are demonstrated to have better EDP performance compared to conventional two's complement multipliers. The hybrid multiplier is also shown to have a superior EDP performance compared to the RBR multiplier, with much lower implementation area. Analysis on the effect of bit-precision is also performed, and it is shown that the performance gain of RBR systems improves for higher bit precision. Next, in order to demonstrate the efficacy of the RBR representation at the system-level, the performance of RBR and hybrid implementations of some common DSP kernels such as Discrete Cosine Transform, edge detection using Sobel operator, complex multiplication, Lifting-based Discrete Wavelet Transform (9, 7) filter, and FIR filter, is compared with two's complement systems. It is shown that for relatively large computation modules, the RBR to two's complement conversion overhead gets amortized. In case of systems with high complexity, for iso-throughput, both the hybrid and RBR implementations are demonstrated to be superior with lower average energy consumption. For low complexity systems, the conversion overhead is significant, and overpowers the EDP performance gain obtained from the RBR computation operation. Dissertation/Thesis Mahadevan, Rupa (Author) Chakrabarti, Chaitali (Advisor) Kiaei, Sayfe (Committee member) Cao, Yu (Committee member) Arizona State University (Publisher) Electrical Engineering data-path design EDP energy redundant binary number system eng 99 pages M.S. Electrical Engineering 2011 Masters Thesis http://hdl.handle.net/2286/R.I.9463 http://rightsstatements.org/vocab/InC/1.0/ All Rights Reserved 2011
collection NDLTD
language English
format Dissertation
sources NDLTD
topic Electrical Engineering
data-path design
EDP
energy
redundant binary number system
spellingShingle Electrical Engineering
data-path design
EDP
energy
redundant binary number system
Energy-efficient DSP System Design based on the Redundant Binary Number System
description abstract: Redundant Binary (RBR) number representations have been extensively used in the past for high-throughput Digital Signal Processing (DSP) systems. Data-path components based on this number system have smaller critical path delay but larger area compared to conventional two's complement systems. This work explores the use of RBR number representation for implementing high-throughput DSP systems that are also energy-efficient. Data-path components such as adders and multipliers are evaluated with respect to critical path delay, energy and Energy-Delay Product (EDP). A new design for a RBR adder with very good EDP performance has been proposed. The corresponding RBR parallel adder has a much lower critical path delay and EDP compared to two's complement carry select and carry look-ahead adder implementations. Next, several RBR multiplier architectures are investigated and their performance compared to two's complement systems. These include two new multiplier architectures: a purely RBR multiplier where both the operands are in RBR form, and a hybrid multiplier where the multiplicand is in RBR form and the other operand is represented in conventional two's complement form. Both the RBR and hybrid designs are demonstrated to have better EDP performance compared to conventional two's complement multipliers. The hybrid multiplier is also shown to have a superior EDP performance compared to the RBR multiplier, with much lower implementation area. Analysis on the effect of bit-precision is also performed, and it is shown that the performance gain of RBR systems improves for higher bit precision. Next, in order to demonstrate the efficacy of the RBR representation at the system-level, the performance of RBR and hybrid implementations of some common DSP kernels such as Discrete Cosine Transform, edge detection using Sobel operator, complex multiplication, Lifting-based Discrete Wavelet Transform (9, 7) filter, and FIR filter, is compared with two's complement systems. It is shown that for relatively large computation modules, the RBR to two's complement conversion overhead gets amortized. In case of systems with high complexity, for iso-throughput, both the hybrid and RBR implementations are demonstrated to be superior with lower average energy consumption. For low complexity systems, the conversion overhead is significant, and overpowers the EDP performance gain obtained from the RBR computation operation. === Dissertation/Thesis === M.S. Electrical Engineering 2011
author2 Mahadevan, Rupa (Author)
author_facet Mahadevan, Rupa (Author)
title Energy-efficient DSP System Design based on the Redundant Binary Number System
title_short Energy-efficient DSP System Design based on the Redundant Binary Number System
title_full Energy-efficient DSP System Design based on the Redundant Binary Number System
title_fullStr Energy-efficient DSP System Design based on the Redundant Binary Number System
title_full_unstemmed Energy-efficient DSP System Design based on the Redundant Binary Number System
title_sort energy-efficient dsp system design based on the redundant binary number system
publishDate 2011
url http://hdl.handle.net/2286/R.I.9463
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