Modeling and Implementation of Threshold Logic Circuits and Architectures
abstract: Threshold logic has long been studied as a means of achieving higher performance and lower power dissipation, providing improvements by condensing simple logic gates into more complex primitives, effectively reducing gate count, pipeline depth, and number of interconnects. This work propos...
Other Authors: | Leshner, Samuel (Author) |
---|---|
Format: | Doctoral Thesis |
Language: | English |
Published: |
2010
|
Subjects: | |
Online Access: | http://hdl.handle.net/2286/R.I.8637 |
Similar Items
-
Design and Simulation of a Nanoscale Threshold-Logic Multiplier
by: Mawahib Hussein Sulieman, et al.
Published: (2019-05-01) -
NANOPIPELINED THRESHOLD SYNTHESIS USING GATE REPLICATION
by: Pierce, Luke
Published: (2011) -
SCALABLE FAULT TOLERANT DESIGN METHODOLOGY FOR THRESHOLD LOGIC GATES
by: PALANISWAMY, ASHOK KUMAR
Published: (2009) -
GBAW for logic synthesis and circuit partitioning.
Published: (2006) -
Multi-Threshold NULL Convention Logic (MTNCL): An Ultra-Low Power Asynchronous Circuit Design Methodology
by: Liang Zhou, et al.
Published: (2015-05-01)