Scratchpad Management in Software Managed Manycore Architectures

abstract: Caches have long been used to reduce memory access latency. However, the increased complexity of cache coherence brings significant challenges in processor design as the number of cores increases. While making caches scalable is still an important research problem, some researchers are exp...

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Other Authors: Cai, Jian (Author)
Format: Doctoral Thesis
Language:English
Published: 2017
Subjects:
SPM
Online Access:http://hdl.handle.net/2286/R.I.46214
id ndltd-asu.edu-item-46214
record_format oai_dc
spelling ndltd-asu.edu-item-462142018-06-22T03:08:57Z Scratchpad Management in Software Managed Manycore Architectures abstract: Caches have long been used to reduce memory access latency. However, the increased complexity of cache coherence brings significant challenges in processor design as the number of cores increases. While making caches scalable is still an important research problem, some researchers are exploring the possibility of a more power-efficient SRAM called scratchpad memories or SPMs. SPMs consume significantly less area, and are more energy-efficient per access than caches, and therefore make the design of on-chip memories much simpler. Unlike caches, which fetch data from memories automatically, an SPM requires explicit instructions for data transfers. SPM-only architectures are thus named as software managed manycore (SMM), since the data movements of such architectures rely on software. SMM processors have been widely used in different areas, such as embedded computing, network processing, or even high performance computing. While SMM processors provide a low-power platform, the hardware alone does not guarantee power efficiency, if applications on such processors deliver low performance. Efficient software techniques are therefore required. A big body of management techniques for SMM architectures are compiler-directed, as inserting data movement operations by hand forces programmers to trace flow of data, which can be error-prone and sometimes difficult if not impossible. This thesis develops compiler-directed techniques to manage data transfers for embedded applications on SMMs efficiently. The techniques analyze and find out the proper program points and insert data movement instructions accordingly. The techniques manage code, stack and heap data of applications, and reduce execution time by 14%, 52% and 80% respectively compared to their predecessors on typical embedded applications. On top of managing local data, a technique is also developed for shared data in SMM architectures. Experimental results show it achieves more than 2X speedup than the previous technique on average. Dissertation/Thesis Cai, Jian (Author) Shrivastava, Aviral (Advisor) Wu, Carole (Committee member) Ren, Fengbo (Committee member) Dasgupta, Partha (Committee member) Arizona State University (Publisher) Computer science compiler multicore scratchpad memory SPM eng 112 pages Doctoral Dissertation Computer Science 2017 Doctoral Dissertation http://hdl.handle.net/2286/R.I.46214 http://rightsstatements.org/vocab/InC/1.0/ All Rights Reserved 2017
collection NDLTD
language English
format Doctoral Thesis
sources NDLTD
topic Computer science
compiler
multicore
scratchpad memory
SPM
spellingShingle Computer science
compiler
multicore
scratchpad memory
SPM
Scratchpad Management in Software Managed Manycore Architectures
description abstract: Caches have long been used to reduce memory access latency. However, the increased complexity of cache coherence brings significant challenges in processor design as the number of cores increases. While making caches scalable is still an important research problem, some researchers are exploring the possibility of a more power-efficient SRAM called scratchpad memories or SPMs. SPMs consume significantly less area, and are more energy-efficient per access than caches, and therefore make the design of on-chip memories much simpler. Unlike caches, which fetch data from memories automatically, an SPM requires explicit instructions for data transfers. SPM-only architectures are thus named as software managed manycore (SMM), since the data movements of such architectures rely on software. SMM processors have been widely used in different areas, such as embedded computing, network processing, or even high performance computing. While SMM processors provide a low-power platform, the hardware alone does not guarantee power efficiency, if applications on such processors deliver low performance. Efficient software techniques are therefore required. A big body of management techniques for SMM architectures are compiler-directed, as inserting data movement operations by hand forces programmers to trace flow of data, which can be error-prone and sometimes difficult if not impossible. This thesis develops compiler-directed techniques to manage data transfers for embedded applications on SMMs efficiently. The techniques analyze and find out the proper program points and insert data movement instructions accordingly. The techniques manage code, stack and heap data of applications, and reduce execution time by 14%, 52% and 80% respectively compared to their predecessors on typical embedded applications. On top of managing local data, a technique is also developed for shared data in SMM architectures. Experimental results show it achieves more than 2X speedup than the previous technique on average. === Dissertation/Thesis === Doctoral Dissertation Computer Science 2017
author2 Cai, Jian (Author)
author_facet Cai, Jian (Author)
title Scratchpad Management in Software Managed Manycore Architectures
title_short Scratchpad Management in Software Managed Manycore Architectures
title_full Scratchpad Management in Software Managed Manycore Architectures
title_fullStr Scratchpad Management in Software Managed Manycore Architectures
title_full_unstemmed Scratchpad Management in Software Managed Manycore Architectures
title_sort scratchpad management in software managed manycore architectures
publishDate 2017
url http://hdl.handle.net/2286/R.I.46214
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