Automated Place and Route Methodologies for Multi-project Test Chips

abstract: This work describes the development of automated flows to generate pad rings, mixed signal power grids, and mega cells in a multi-project test chip. There were three major design flows that were created to create the test chip. The first was the pad ring which was used as the staring block...

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Other Authors: Lieb, Christopher Anthony (Author)
Format: Dissertation
Language:English
Published: 2015
Subjects:
Online Access:http://hdl.handle.net/2286/R.I.29754
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spelling ndltd-asu.edu-item-297542018-06-22T03:06:01Z Automated Place and Route Methodologies for Multi-project Test Chips abstract: This work describes the development of automated flows to generate pad rings, mixed signal power grids, and mega cells in a multi-project test chip. There were three major design flows that were created to create the test chip. The first was the pad ring which was used as the staring block for creating the test chip. This flow put all of the signals for the chip in the order that was wanted along the outside of the die along with creation of the power ring that is used to supply the chip with a robust power source. The second flow that was created was used to put together a flash block that is based off of a XILIX XCFXXP. This flow was somewhat similar to how the pad ring flow worked except that optimizations and a clock tree was added into the flow. There was a couple of design redoes due to timing and orientation constraints. Finally, the last flow that was created was the top level flow which is where all of the components are combined together to create a finished test chip ready for fabrication. The main components that were used were the finished flash block, HERMES, test structures, and a clock instance along with the pad ring flow for the creation of the pad ring and power ring. Also discussed is some work that was done on a previous multi-project test chip. The work that was done was the creation of power gaters that were used like switches to turn the power on and off for some flash modules. To control the power gaters the functionality change of some pad drivers was done so that they output a higher voltage than what is seen in the core of the chip. Dissertation/Thesis Lieb, Christopher Anthony (Author) Clark, Lawrence (Advisor) Holbert, Keith (Committee member) Seo, Jae-sun (Committee member) Arizona State University (Publisher) Electrical engineering eng 66 pages Masters Thesis Electrical Engineering 2015 Masters Thesis http://hdl.handle.net/2286/R.I.29754 http://rightsstatements.org/vocab/InC/1.0/ All Rights Reserved 2015
collection NDLTD
language English
format Dissertation
sources NDLTD
topic Electrical engineering
spellingShingle Electrical engineering
Automated Place and Route Methodologies for Multi-project Test Chips
description abstract: This work describes the development of automated flows to generate pad rings, mixed signal power grids, and mega cells in a multi-project test chip. There were three major design flows that were created to create the test chip. The first was the pad ring which was used as the staring block for creating the test chip. This flow put all of the signals for the chip in the order that was wanted along the outside of the die along with creation of the power ring that is used to supply the chip with a robust power source. The second flow that was created was used to put together a flash block that is based off of a XILIX XCFXXP. This flow was somewhat similar to how the pad ring flow worked except that optimizations and a clock tree was added into the flow. There was a couple of design redoes due to timing and orientation constraints. Finally, the last flow that was created was the top level flow which is where all of the components are combined together to create a finished test chip ready for fabrication. The main components that were used were the finished flash block, HERMES, test structures, and a clock instance along with the pad ring flow for the creation of the pad ring and power ring. Also discussed is some work that was done on a previous multi-project test chip. The work that was done was the creation of power gaters that were used like switches to turn the power on and off for some flash modules. To control the power gaters the functionality change of some pad drivers was done so that they output a higher voltage than what is seen in the core of the chip. === Dissertation/Thesis === Masters Thesis Electrical Engineering 2015
author2 Lieb, Christopher Anthony (Author)
author_facet Lieb, Christopher Anthony (Author)
title Automated Place and Route Methodologies for Multi-project Test Chips
title_short Automated Place and Route Methodologies for Multi-project Test Chips
title_full Automated Place and Route Methodologies for Multi-project Test Chips
title_fullStr Automated Place and Route Methodologies for Multi-project Test Chips
title_full_unstemmed Automated Place and Route Methodologies for Multi-project Test Chips
title_sort automated place and route methodologies for multi-project test chips
publishDate 2015
url http://hdl.handle.net/2286/R.I.29754
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