SystemC TLM2.0 Modeling of Network-on-Chip Architecture
abstract: Network-on-Chip (NoC) architectures have emerged as the solution to the on-chip communication challenges of multi-core embedded processor architectures. Design space exploration and performance evaluation of a NoC design requires fast simulation infrastructure. Simulation of register trans...
| Other Authors: | |
|---|---|
| Format: | Dissertation |
| Language: | English |
| Published: |
2012
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/2286/R.I.14547 |