Architectures for Real-Time Digital Channel Simulators

International Telemetering Conference Proceedings / October 14-16, 1975 / Sheraton Inn, Silver Spring, Maryland === This paper suggests an all-digital, time domain approach for real-time simulation of digital communications channels and proposes four possible implementations of the time-domain appro...

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Bibliographic Details
Main Author: O'Grady, E. P.
Other Authors: University of Maryland
Language:en_US
Published: International Foundation for Telemetering 1975
Online Access:http://hdl.handle.net/10150/609345
http://arizona.openrepository.com/arizona/handle/10150/609345
Description
Summary:International Telemetering Conference Proceedings / October 14-16, 1975 / Sheraton Inn, Silver Spring, Maryland === This paper suggests an all-digital, time domain approach for real-time simulation of digital communications channels and proposes four possible implementations of the time-domain approach using standard minicomputers or microprocessors and peripheral random number generators. The time-domain method is based on simulating the digital channel on a bits-in, bits-out basis with bit errors introduced into the bit stream in a manner which approximates the error sequence of a real (or hypothetical) communications channel. The error sequence of the simulator can duplicate a measured error sequence or it can be generated by a stochastic model of the error sequence. The four proposed implementations represent different levels of complexity in the architecture of the channel simulator. The first proposed implementation employs only a single computer; the second employs a computer and a peripheral random number generator; the third employs a computer and multiple peripheral random number generators; the fourth employs multiple computers and multiple peripheral random number generators. The significance of the time-domain approach lies in its potential application to the design of high performance, general-purpose media simulators at greatly reduced cost due to the use of standard hardware and relatively simple processing.