AN HEURISTIC SEARCH APPROACH TO TEST SEQUENCE GENERATION FOR AHPL (A HARDWARE PROGRAMMING LANGUAGE) DESCRIBED SYNCHRONOUS SEQUENTIAL CIRCUITS

AN HEURISTIC SEARCH APPROACH TO TEST SEQUENCE GENERATION FOR AHPL (A HARDWARE PROGRAMMING LANGUAGE) DESCRIBED SYNCHRONOUS SEQUENTIAL CIRCUITS

Bibliographic Details
Main Author:	Belt, John Edward, 1933-
Language:	en_US
Published:	The University of Arizona. 1973
Subjects:	Digital integrated circuits > Testing. Logic circuits > Testing. Electric fault location > Data processing. AHPL (Computer program language)
Online Access:	http://hdl.handle.net/10150/288052

Similar Items

EXTENSIONS OF AHPL AND OPTIMIZATION OF THE AHPL COMPILER FOR MSI/LSI DESIGN
by: Swanson, Robert Earl, 1944-
Published: (1978)

FAULT-TEST GENERATION FOR SEQUENTIAL CIRCUITS DESCRIBED IN AHPL
by: Carter, Ernest Aubert, 1942-
Published: (1973)

COMPILATION OF AHPL DESCRIPTIONS WITH COMBINATION LOGIC UNIT TO PATH PROGRAMMABLE LOGIC ARRAYS.
by: Lao, James Verano.
Published: (1984)

A programmed test sequence generation to detect and distinguish failures in a combinational circuit
by: Huang, George Huang-Liang, 1938-
Published: (1973)

The AHPL Combinational Logic Language and compiler
by: Goddard, Charles Kent, 1937-
Published: (1971)

Evaluation of SCIRTSS performance on sequential circuits biased against random sequences
by: Van Helsland, Marshall Camiel, 1943-
Published: (1974)

SEARCH DIRECTING HEURISTICS FOR THE SEQUENTIAL CIRCUIT TEST SEARCH SYSTEM (SCIRTSS)
by: Huey, Ben Milton, 1945-
Published: (1975)

A post-processing system for an AHPL simulator
by: Madhavan, Pundi Sreenivasan
Published: (2017)

An interactive program for determination of fault detecting sequences
by: Lin, Liang-Tsai, 1944-
Published: (1970)

Evaluation of a LSI fault detection program using a four bit micro-computer processor circuit
by: Ng, Wai Wing, 1949-
Published: (1974)

Fault isolation and diagnosis techniques for mixed-signal circuits
by: Cherubal, Sasikumar
Published: (2007)

HARDWARE COMPILER DRIVEN HEURISTIC SEARCH FOR DIGITAL IC TEST SEQUENCES.
by: Patel, Mayank Raman.
Published: (1985)

MODULAR IMPLEMENTATION OF A DIGITAL HARDWARE DESIGN AUTOMATION SYSTEM
by: Masud, Manzer, 1950-
Published: (1981)

VLSI DESIGN AUTOMATION USING A HARDWARE PROGRAMMING LANGUAGE
by: Navabi, Zainalabedin, 1952-
Published: (1981)

Fault simulation and test pattern generation for synchronous and asynchronous sequential circuits
by: Lee, Hyung Ki
Published: (2014)

An open-label, interventional, single-center, prospective clinical study to evaluate the efficacy and safety of “AHPL/AYTAB/1514” in patients suffering from halitosis
by: Yusuf K Chunawala, et al.
Published: (2018-01-01)

AUTOMATIC COMPILATION OF AHPL DESCRIPTIONS TO PATH PROGRAMMABLE LOGIC ARRAYS.
by: Olson, Timothy Alan.
Published: (1984)

COMPARISON OF SCIRTSS EFFICIENCY WITH D-ALGORITHM APPLICATION TO ITERATIVE NETWORKS (TEST).
by: Chen, Daven, 1959-
Published: (1986)

On Enhancing Deterministic Sequential ATPG
by: Duong, Khanh Viet
Published: (2014)

A clinical study to evaluate efficacy and safety of AHPL/AYTAB/0313 tablet in subjects suffering from osteoarthritis of knee(s)
by: Sanjay U Nipanikar, et al.
Published: (2020-01-01)

The evaluation of the PODEM algorithm as a mechanism to generate goal states for a sequential circuit test search
by: Lee, Hoi-Ming Bonny, 1961-
Published: (1988)

An open label, randomized, comparative, parallel group, multicenter, prospective, interventional, clinical study to evaluate efficacy and safety of “AHPL/AYTOP/0113” in comparison with “Framycetin sulphate cream” in acute wounds
by: Sanjay U Nipanikar, et al.
Published: (2017-01-01)

Synchronous fault simulation by surrogate with exceptions.
by: Wang, Xiaolin.
Published: (1989)

Sequential circuits fault simulation using fan out stem based techniques.
by: Abuelyaman, Eltayeb Salih.
Published: (1988)

New digital testing for parametric fault detection in analog circuits using classified frequency-bands and efficient test-point selection
by: Bassam A. Abo-elftooh, et al.
Published: (2021-06-01)

FPGA BASED SELF-HEALING STRATEGY FOR SYNCHRONOUS SEQUENTIAL CIRCUITS
by: G. NITHYA, et al.
Published: (2018-12-01)

An intelligence driven test system for detection of stuck-open faults in CMOS sequential circuits
by: Sagahyroon, Assim Abdelrahman
Published: (1989)

Distribution fault location using short-circuit fault current profile approach
by: Das, Swagata
Published: (2012)

COMPUTER ANALYSIS OF ACTIVE DEVICES FOR INTEGRATED THERMIONIC CIRCUITS
by: Feugate, Robert J., 1946-
Published: (1974)

An efficient single-latch scan-design scheme/
by: Panda, Uma R.
Published: (1985)

Current mode analog and digital circuit design
by: Liang, Guojin
Published: (2013)

An automatic test pattern generation in the logic gate level circuits and MOS transistor circuits at Ohio University
by: Lee, Hoon-Kyeu
Published: (1986)

Statistical prediction of integrated circuit performance based on circuit design and test structure evaluation
by: Gibson, David
Published: (2007)

Conditional stuck-at fault model for PLA test generation
by: Cornelia, Olivian E.
Published: (1987)

Defect site prediction based upon statistical analysis of fault signatures
by: Trinka, Michael Robert
Published: (2004)

Multiple Soft Fault Diagnosis of Bjt Circuits
by: Tadeusiewicz Michał, et al.
Published: (2014-12-01)

Test generation for fault isolation in analog and mixed-mode circuits
by: Chakrabarti, Sudip
Published: (2007)

VLSI REALIZATION OF AHPL DESCRIPTION AS SLA, PPLA, & ULA AND THEIR COMPARISONS (CAD).
by: CHEN, DUAN-PING.
Published: (1984)

Efficient Logic Encryption Techniques for Sequential Circuits
by: Kasarabada, Yasaswy V.
Published: (2021)

Logic Encryption of Sequential Circuits
by: Thulasi Raman, Sudheer Ram
Published: (2019)