THERMAL MODELING/SIMULATION OF LEVEL 1 AND LEVEL 2 VLSI PACKAGING

Bibliographic Details
Main Author: Jafar, Mutaz, 1960-
Language:en_US
Published: The University of Arizona. 1986
Subjects:
Online Access:http://hdl.handle.net/10150/276959
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spelling ndltd-arizona.edu-oai-arizona.openrepository.com-10150-2769592015-10-23T05:02:39Z THERMAL MODELING/SIMULATION OF LEVEL 1 AND LEVEL 2 VLSI PACKAGING Jafar, Mutaz, 1960- Integrated circuits -- Very large scale integration. 1986 text Thesis-Reproduction (electronic) http://hdl.handle.net/10150/276959 16749836 1329492 .b16141696 en_US Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author. The University of Arizona.
collection NDLTD
language en_US
sources NDLTD
topic Integrated circuits -- Very large scale integration.
spellingShingle Integrated circuits -- Very large scale integration.
Jafar, Mutaz, 1960-
THERMAL MODELING/SIMULATION OF LEVEL 1 AND LEVEL 2 VLSI PACKAGING
author Jafar, Mutaz, 1960-
author_facet Jafar, Mutaz, 1960-
author_sort Jafar, Mutaz, 1960-
title THERMAL MODELING/SIMULATION OF LEVEL 1 AND LEVEL 2 VLSI PACKAGING
title_short THERMAL MODELING/SIMULATION OF LEVEL 1 AND LEVEL 2 VLSI PACKAGING
title_full THERMAL MODELING/SIMULATION OF LEVEL 1 AND LEVEL 2 VLSI PACKAGING
title_fullStr THERMAL MODELING/SIMULATION OF LEVEL 1 AND LEVEL 2 VLSI PACKAGING
title_full_unstemmed THERMAL MODELING/SIMULATION OF LEVEL 1 AND LEVEL 2 VLSI PACKAGING
title_sort thermal modeling/simulation of level 1 and level 2 vlsi packaging
publisher The University of Arizona.
publishDate 1986
url http://hdl.handle.net/10150/276959
work_keys_str_mv AT jafarmutaz1960 thermalmodelingsimulationoflevel1andlevel2vlsipackaging
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