A NEW TEST GENERATION ALGORITHM IMPLEMENTATION
This thesis describes a new test generating algorithm, depth-first algorithm. This algorithm detects the reconvergent fanout. The controllability and observability measures are included in this algorithm to guide the forward and consistency drives. The major objective of this research is to develop...
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ndltd-arizona.edu-oai-arizona.openrepository.com-10150-2765272015-10-23T05:01:44Z A NEW TEST GENERATION ALGORITHM IMPLEMENTATION Chen, Yaw-Huei, 1959- Algorithms. Digital electronics -- Testing. This thesis describes a new test generating algorithm, depth-first algorithm. This algorithm detects the reconvergent fanout. The controllability and observability measures are included in this algorithm to guide the forward and consistency drives. The major objective of this research is to develop a test vector generatiang algorithm, which is modified from D-algorithm, and to link this algorithm with SCIRTSS programs. This depth-first algorithm is more accurate and more efficient than D-algorithm. Serveral circuits are tested under DF3 and SCR3 and the results are listed in this paper. 1987 text Thesis-Reproduction (electronic) http://hdl.handle.net/10150/276527 18152737 1332152 .b16482384 en_US Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author. The University of Arizona. |
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en_US |
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Algorithms. Digital electronics -- Testing. |
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Algorithms. Digital electronics -- Testing. Chen, Yaw-Huei, 1959- A NEW TEST GENERATION ALGORITHM IMPLEMENTATION |
description |
This thesis describes a new test generating algorithm, depth-first algorithm. This algorithm detects the reconvergent fanout. The controllability and observability measures are included in this algorithm to guide the forward and consistency drives. The major objective of this research is to develop a test vector generatiang algorithm, which is modified from D-algorithm, and to link this algorithm with SCIRTSS programs. This depth-first algorithm is more accurate and more efficient than D-algorithm. Serveral circuits are tested under DF3 and SCR3 and the results are listed in this paper. |
author |
Chen, Yaw-Huei, 1959- |
author_facet |
Chen, Yaw-Huei, 1959- |
author_sort |
Chen, Yaw-Huei, 1959- |
title |
A NEW TEST GENERATION ALGORITHM IMPLEMENTATION |
title_short |
A NEW TEST GENERATION ALGORITHM IMPLEMENTATION |
title_full |
A NEW TEST GENERATION ALGORITHM IMPLEMENTATION |
title_fullStr |
A NEW TEST GENERATION ALGORITHM IMPLEMENTATION |
title_full_unstemmed |
A NEW TEST GENERATION ALGORITHM IMPLEMENTATION |
title_sort |
new test generation algorithm implementation |
publisher |
The University of Arizona. |
publishDate |
1987 |
url |
http://hdl.handle.net/10150/276527 |
work_keys_str_mv |
AT chenyawhuei1959 anewtestgenerationalgorithmimplementation AT chenyawhuei1959 newtestgenerationalgorithmimplementation |
_version_ |
1718102305507639296 |