Power Analysis of Sub-threshold Logics for Security Applications

Requirements of ultra-low power for many portable devices have drawn increased attention to digital sub-threshold logic design. Major reductions in power consumption and frequency of operation degradation due to the exponential decrease of the drain current in the sub-threshold region has made this...

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Main Author: Haghighizadeh, Farhad
Language:en
Published: 2012
Subjects:
Online Access:http://hdl.handle.net/10012/7019
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spelling ndltd-WATERLOO-oai-uwspace.uwaterloo.ca-10012-70192013-01-08T18:55:59ZHaghighizadeh, Farhad2012-09-26T16:17:29Z2012-09-26T16:17:29Z2012-09-26T16:17:29Z2012http://hdl.handle.net/10012/7019Requirements of ultra-low power for many portable devices have drawn increased attention to digital sub-threshold logic design. Major reductions in power consumption and frequency of operation degradation due to the exponential decrease of the drain current in the sub-threshold region has made this logic an excellent choice, particularly for ultra-low power applications where performance is not the primary concern. Examples include RFID, wireless sensor networks and biomedical implantable devices. Along with energy consumption, security is another compelling requirement for these applications. Power analysis attacks, such as Correlation Power Analysis (CPA), are a powerful type of side channel attacks that are capable of performing a non-invasive attack with minimum equipment. As such, they present a serious threat to devices with secret information inside. This research analyzes sub-threshold logics from a previously unexplored perspective, side channel information leakage. Various transistor level and RTL circuits are implemented in the sub-threshold region as well as in the strong inversion region (normally the standard region of operation) using a 65 nm process. Measures, such as Difference of Mean Energies (DME), Normalized Energy Deviation (NED) and Normalized Standard Deviation (NSD) are employed to evaluate the implemented architectures. A CPA attack is also performed on more complex designs and the obtained correlation coefficients are used to compare sub-threshold and strong inversion logics. This research demonstrates that sub-threshold does not only increase the security against side channel attacks, but can also decrease the amount of leaked information. This research also shows that a circuit operating at sub-threshold consumes considerably less energy than the same circuit operating in strong inversion and the level of its instantaneous power consumption is significantly lower. Therefore, the noise power required to cover the secret information decreases and the attack may be dramatically more difficult due to major increase in the number of required power traces and run time. Thus, this research is important for identifying sub-threshold as a future viable technology for secure embedded applications.enSub-threshold CircuitsPower Analysis AttacksPower Analysis of Sub-threshold Logics for Security ApplicationsThesis or DissertationElectrical and Computer EngineeringMaster of Applied ScienceElectrical and Computer Engineering
collection NDLTD
language en
sources NDLTD
topic Sub-threshold Circuits
Power Analysis Attacks
Electrical and Computer Engineering
spellingShingle Sub-threshold Circuits
Power Analysis Attacks
Electrical and Computer Engineering
Haghighizadeh, Farhad
Power Analysis of Sub-threshold Logics for Security Applications
description Requirements of ultra-low power for many portable devices have drawn increased attention to digital sub-threshold logic design. Major reductions in power consumption and frequency of operation degradation due to the exponential decrease of the drain current in the sub-threshold region has made this logic an excellent choice, particularly for ultra-low power applications where performance is not the primary concern. Examples include RFID, wireless sensor networks and biomedical implantable devices. Along with energy consumption, security is another compelling requirement for these applications. Power analysis attacks, such as Correlation Power Analysis (CPA), are a powerful type of side channel attacks that are capable of performing a non-invasive attack with minimum equipment. As such, they present a serious threat to devices with secret information inside. This research analyzes sub-threshold logics from a previously unexplored perspective, side channel information leakage. Various transistor level and RTL circuits are implemented in the sub-threshold region as well as in the strong inversion region (normally the standard region of operation) using a 65 nm process. Measures, such as Difference of Mean Energies (DME), Normalized Energy Deviation (NED) and Normalized Standard Deviation (NSD) are employed to evaluate the implemented architectures. A CPA attack is also performed on more complex designs and the obtained correlation coefficients are used to compare sub-threshold and strong inversion logics. This research demonstrates that sub-threshold does not only increase the security against side channel attacks, but can also decrease the amount of leaked information. This research also shows that a circuit operating at sub-threshold consumes considerably less energy than the same circuit operating in strong inversion and the level of its instantaneous power consumption is significantly lower. Therefore, the noise power required to cover the secret information decreases and the attack may be dramatically more difficult due to major increase in the number of required power traces and run time. Thus, this research is important for identifying sub-threshold as a future viable technology for secure embedded applications.
author Haghighizadeh, Farhad
author_facet Haghighizadeh, Farhad
author_sort Haghighizadeh, Farhad
title Power Analysis of Sub-threshold Logics for Security Applications
title_short Power Analysis of Sub-threshold Logics for Security Applications
title_full Power Analysis of Sub-threshold Logics for Security Applications
title_fullStr Power Analysis of Sub-threshold Logics for Security Applications
title_full_unstemmed Power Analysis of Sub-threshold Logics for Security Applications
title_sort power analysis of sub-threshold logics for security applications
publishDate 2012
url http://hdl.handle.net/10012/7019
work_keys_str_mv AT haghighizadehfarhad poweranalysisofsubthresholdlogicsforsecurityapplications
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