Design of algorithms for optimum area utilization in ASIC’s

optimum area utilization in ASIC’s

Bibliographic Details
Main Author: Chiplunkar, Niranjan N
Other Authors: Bhat, Chitrasena
Format: Others
Language:en
Published: 2007
Subjects:
Online Access:http://hdl.handle.net/2009/2116
Description
Summary:optimum area utilization in ASIC’s