An efficient test generation algorithm for behavioral descriptions of digital devices
An efficient test generation algorithm for behavioral descriptions is discussed. It generates tests for behavioral dataflow descriptions of digital circuits written in VHDL. The algorithm accepts input descriptions containing multiple process statements and concurrent signal assignment statements. T...
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| Format: | Others |
| Language: | en_US |
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Virginia Polytechnic Institute and State University
2015
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| Online Access: | http://hdl.handle.net/10919/53723 |
