VHDL modeling of ASIC power dissipation
Accurate predict of ASIC power diss ion is possible using VHDL. By using physical data types, timing and power estimations can be based on estimated typical fan-in and fan-out conditions and a pre-characterized circuit library. Actual load conditions can be back annotated to yield actual power dissi...
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| Format: | Dissertation |
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Virginia Tech
2014
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| Online Access: | http://hdl.handle.net/10919/45224 http://scholar.lib.vt.edu/theses/available/etd-10222009-124831/ |