Development of VHDL behavioral models with back annotated timing

Development of VHDL behavioral models with back annotated timing

This thesis describes the development of BACKANN, a tool for the back annotation of timing delays into VHDL models. BACKANN uses the Process Model Graph and the VHDL behavioral model generated by the Modeler's Assistant as the base for backannotation. BACKANN determines the delay values that ar...

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Bibliographic Details
Main Author: Narayanaswamy, Sathyanarayanan
Other Authors: Electrical Engineering
Format: Others
Language:en
Published: Virginia Tech 2014
Subjects:
LD5655.V855 1994.N373
Integrated circuits > Very large scale integration > Computer simulation
VHDL (Computer hardware description language)
Online Access:http://hdl.handle.net/10919/43158
http://scholar.lib.vt.edu/theses/available/etd-06112009-063442/

Internet

http://hdl.handle.net/10919/43158
http://scholar.lib.vt.edu/theses/available/etd-06112009-063442/

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