A test plan driven test bench generation system
<p>Testing and verification of large DSP models is a laborious and time consuming task. Test benches provide a platform for testing VHDL models. Development of good test benches is very critical in reducing the time, manpower and costs involved in testing of such models. Sometimes the developm...
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| Format: | Others |
| Language: | en |
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Virginia Tech
2014
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| Online Access: | http://hdl.handle.net/10919/40835 http://scholar.lib.vt.edu/theses/available/etd-01312009-063203/ |