| Summary: | Tampering and Reverse Engineering of a chip to extract the hardware Intellectual Property
(IP) core or to inject malicious alterations is a major concern. First, offshore chip manufac-
turing allows the design secrets of the IP cores to be transparent to the foundry and other
entities along the production chain. Second, small malicious modifications to the design
may not be detectable after fabrication without anti-tamper mechanisms. Counterfeit Inte-
grated Circuits (ICs) also have become an important security issue in recent years, in which
counterfeit ICs that perform incorrectly or sub-par to the expected can lead to catastrophic
consequences in safety and/or mission-critical applications, in addition to the tremendous
economic toll they incur to the semiconductor industry. Some techniques have been devel-
oped in the past to improve the defense against such attacks but they tend to fall prey to
the increasing power of the attacker. We present a new way to protect against tampering
by a clever obfuscation of the design, which can be unlocked with a specific, dynamic path
traversal. Hence, the functional mode of the controller is hidden with the help of obfuscated
states, and the functional mode is made operational only on the formation of a specific
interlocked Code-Word during state transition. A novel time-stamp is proposed that can
provide the date at which the IC was manufactured for counterfeit detection. Furthermore,
we propose a second layer of tamper resistance to the time-stamp circuit to make it even
more difficult to modify. Results show that methods proposed offer higher levels of security
with small area overhead. A side benefit is that any small alteration will be magnified via
the obfuscated design proposed in these methods. === Master of Science
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