Mitigation Of Soft Errors In ASIC-Based and FPGA-Based Logic Circuits
With ever decreasing device feature sizes, subsequent generations of semiconductor logic circuits are more vulnerable to ionizing radiation effects when compared to their predecessors. Single Event Upsets (SEUs) and Single Event Transients (SETs) induced in Application Specific Integrated Circuits...
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| Format: | Others |
| Language: | en |
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VANDERBILT
2006
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| Online Access: | http://etd.library.vanderbilt.edu/available/etd-03272006-092638/ |