Fault clearance in distributed power architectures with limited energy flow through power electronic interfaces
The objective of this thesis is to determine a method for computing the amount of capacitance in a power electronic converter required to melt a fuse in the event of a line to ground fault. DC micro-grids rely on power electronic converters to change voltage levels. All converters rely on semiconduc...
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| Format: | Others |
| Language: | English |
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2012
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| Online Access: | http://hdl.handle.net/2152/ETD-UT-2012-05-5550 |