Statistical characterization for timing sign-off : from silicon to design and back to silicon
With aggressive technology scaling, within-die random variations are becoming the most dominant source of process variations. Gate-level statistical static timing is becoming a widely accepted approach as an alternative to static timing analysis. However, statistical timing approaches lack good mode...
| Main Author: | |
|---|---|
| Format: | Others |
| Language: | English |
| Published: |
2009
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/2152/6658 |