Study of initial void formation and electron wind force for scaling effects on electromigration in Cu interconnects

The continuing scaling of integrated circuits beyond 22nm technology node poses increasing challenges to Electromigration (EM) reliability for Cu on-chip interconnects. First, the width of Cu lines in advanced technology nodes is less than the electron mean free path which is 39nm in Cu at room temp...

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Main Author: Wu, Zhuojie
Format: Others
Published: 2014
Subjects:
Online Access:http://hdl.handle.net/2152/25145
id ndltd-UTEXAS-oai-repositories.lib.utexas.edu-2152-25145
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spelling ndltd-UTEXAS-oai-repositories.lib.utexas.edu-2152-251452015-09-20T17:24:14ZStudy of initial void formation and electron wind force for scaling effects on electromigration in Cu interconnectsWu, ZhuojieSemiconductorInterconnectsElectromigrationElectron wind forceScalingResistance traceVoidScatteringReactive ion etchingElectron beam lithographyAnisotropic wet etchingStressModelingThe continuing scaling of integrated circuits beyond 22nm technology node poses increasing challenges to Electromigration (EM) reliability for Cu on-chip interconnects. First, the width of Cu lines in advanced technology nodes is less than the electron mean free path which is 39nm in Cu at room temperature. This is a new size regime where any new scaling effect on EM is of basic interest. And second, the reduced line width necessitates the development of new methods to analyze the EM characteristics. Such studies will require the development of well controlled processes to fabricate suitable test structures for EM study and model verification. This dissertation is to address these critical issues for EM in Cu interconnects. The dissertation first studies the initial void growth under EM, which is critical for measurement of the EM lifetime and statistics. A method based on analyzing the resistance traces obtained from EM tests of multi-link structures has been developed. The results indicated that there are three stages in the resistance traces where the rate of the initial void growth in Stage I is lower than that in Stage III after interconnect failure and they are linearly correlated. An analysis extending the Korhonen model has been formulated to account for the initial void formation. In this analysis, the stress evolution in the line during void growth under EM was analyzed in two regions and an analytic solution was deduced for the void growth rate. A Monte Carlo grain growth simulation based on the Potts model was performed to obtain grain structures for void growth analysis. The results from this analysis agreed reasonably well with the EM experiments. The next part of the dissertation is to study the size effect on the electron wind force for a thin film and for a line with a rectangular cross section. The electron wind force was modeled by considering the momentum transfer during collision between electrons and an atom. The scaling effect on the electron wind force was found to be represented by a size factor depending on the film/line dimensions. In general, the electron wind force is enhanced with increasing dimensional confinement. Finally, a process for fabrication of Si nanotrenches was developed for deposition of Cu nanolines with well-defined profiles. A self-aligned sub-lithographic mask technique was developed using polymer residues formed on Si surfaces during reactive ion etching of Si dioxide in a fluorocarbon plasma. This method was capable to fabricate ultra-narrow Si nanotrenches down to 20nm range with rectangular profiles and smooth sidewalls, which are ideal for studying EM damage mechanisms and model verification for future technology nodes.text2014-07-11T20:10:36Z2013-052013-06-14May 20132014-07-11T20:10:37ZThesisapplication/pdfhttp://hdl.handle.net/2152/25145
collection NDLTD
format Others
sources NDLTD
topic Semiconductor
Interconnects
Electromigration
Electron wind force
Scaling
Resistance trace
Void
Scattering
Reactive ion etching
Electron beam lithography
Anisotropic wet etching
Stress
Modeling
spellingShingle Semiconductor
Interconnects
Electromigration
Electron wind force
Scaling
Resistance trace
Void
Scattering
Reactive ion etching
Electron beam lithography
Anisotropic wet etching
Stress
Modeling
Wu, Zhuojie
Study of initial void formation and electron wind force for scaling effects on electromigration in Cu interconnects
description The continuing scaling of integrated circuits beyond 22nm technology node poses increasing challenges to Electromigration (EM) reliability for Cu on-chip interconnects. First, the width of Cu lines in advanced technology nodes is less than the electron mean free path which is 39nm in Cu at room temperature. This is a new size regime where any new scaling effect on EM is of basic interest. And second, the reduced line width necessitates the development of new methods to analyze the EM characteristics. Such studies will require the development of well controlled processes to fabricate suitable test structures for EM study and model verification. This dissertation is to address these critical issues for EM in Cu interconnects. The dissertation first studies the initial void growth under EM, which is critical for measurement of the EM lifetime and statistics. A method based on analyzing the resistance traces obtained from EM tests of multi-link structures has been developed. The results indicated that there are three stages in the resistance traces where the rate of the initial void growth in Stage I is lower than that in Stage III after interconnect failure and they are linearly correlated. An analysis extending the Korhonen model has been formulated to account for the initial void formation. In this analysis, the stress evolution in the line during void growth under EM was analyzed in two regions and an analytic solution was deduced for the void growth rate. A Monte Carlo grain growth simulation based on the Potts model was performed to obtain grain structures for void growth analysis. The results from this analysis agreed reasonably well with the EM experiments. The next part of the dissertation is to study the size effect on the electron wind force for a thin film and for a line with a rectangular cross section. The electron wind force was modeled by considering the momentum transfer during collision between electrons and an atom. The scaling effect on the electron wind force was found to be represented by a size factor depending on the film/line dimensions. In general, the electron wind force is enhanced with increasing dimensional confinement. Finally, a process for fabrication of Si nanotrenches was developed for deposition of Cu nanolines with well-defined profiles. A self-aligned sub-lithographic mask technique was developed using polymer residues formed on Si surfaces during reactive ion etching of Si dioxide in a fluorocarbon plasma. This method was capable to fabricate ultra-narrow Si nanotrenches down to 20nm range with rectangular profiles and smooth sidewalls, which are ideal for studying EM damage mechanisms and model verification for future technology nodes. === text
author Wu, Zhuojie
author_facet Wu, Zhuojie
author_sort Wu, Zhuojie
title Study of initial void formation and electron wind force for scaling effects on electromigration in Cu interconnects
title_short Study of initial void formation and electron wind force for scaling effects on electromigration in Cu interconnects
title_full Study of initial void formation and electron wind force for scaling effects on electromigration in Cu interconnects
title_fullStr Study of initial void formation and electron wind force for scaling effects on electromigration in Cu interconnects
title_full_unstemmed Study of initial void formation and electron wind force for scaling effects on electromigration in Cu interconnects
title_sort study of initial void formation and electron wind force for scaling effects on electromigration in cu interconnects
publishDate 2014
url http://hdl.handle.net/2152/25145
work_keys_str_mv AT wuzhuojie studyofinitialvoidformationandelectronwindforceforscalingeffectsonelectromigrationincuinterconnects
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