Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation
The electronic design automation (EDA) tools are a specific set of software that play important roles in modern integrated circuit (IC) design. These software automate the design processes of IC with various stages. Among these stages, two important EDA design tools are the focus of this research: f...
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ndltd-UTAHS-oai-digitalcommons.usu.edu-etd-49042019-10-13T06:13:29Z Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation Han, Yiding The electronic design automation (EDA) tools are a specific set of software that play important roles in modern integrated circuit (IC) design. These software automate the design processes of IC with various stages. Among these stages, two important EDA design tools are the focus of this research: floorplanning and global routing. Specifically, the goal of this study is to parallelize these two tools such that their execution time can be significantly shortened on modern multi-core and graphics processing unit (GPU) architectures. The GPU hardware is a massively parallel architecture, enabling thousands of independent threads to execute concurrently. Although a small set of EDA tools can benefit from using GPU to accelerate their speed, most algorithms in this field are designed with the single-core paradigm in mind. The floorplanning and global routing algorithms are among the latter, and difficult to render any speedup on the GPU due to their inherent sequential nature. This work parallelizes the floorplanning and global routing algorithm through a novel approach and results in significant speedups for both tools implemented on the GPU hardware. Specifically, with a complete overhaul of solution space and design space exploration, a GPU-based floorplanning algorithm is able to render 4-166X speedup, while achieving similar or improved solutions compared with the sequential algorithm. The GPU-based global routing algorithm is shown to achieve significant speedup against existing state-of-the-art routers, while delivering competitive solution quality. Importantly, this parallel model for global routing renders a stable solution that is independent from the level of parallelism. In summary, this research has shown that through a design paradigm overhaul, sequential algorithms can also benefit from the massively parallel architecture. The findings of this study have a positive impact on the efficiency and design quality of modern EDA design flow. 2014-05-01T07:00:00Z text application/pdf https://digitalcommons.usu.edu/etd/3868 https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=4904&context=etd Copyright for this work is held by the author. Transmission or reproduction of materials protected by copyright beyond that allowed by fair use requires the written permission of the copyright owners. Works not in the public domain cannot be commercially exploited without permission of the copyright owner. Responsibility for any use rests exclusively with the user. For more information contact Andrew Wesolek (andrew.wesolek@usu.edu). All Graduate Theses and Dissertations DigitalCommons@USU Graphics Processing Unit-Based Computer-Aided Design Algorithms Electronic Design Electrical and Computer Engineering |
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Graphics Processing Unit-Based Computer-Aided Design Algorithms Electronic Design Electrical and Computer Engineering |
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Graphics Processing Unit-Based Computer-Aided Design Algorithms Electronic Design Electrical and Computer Engineering Han, Yiding Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation |
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The electronic design automation (EDA) tools are a specific set of software that play important roles in modern integrated circuit (IC) design. These software automate the design processes of IC with various stages. Among these stages, two important EDA design tools are the focus of this research: floorplanning and global routing. Specifically, the goal of this study is to parallelize these two tools such that their execution time can be significantly shortened on modern multi-core and graphics processing unit (GPU) architectures. The GPU hardware is a massively parallel architecture, enabling thousands of independent threads to execute concurrently. Although a small set of EDA tools can benefit from using GPU to accelerate their speed, most algorithms in this field are designed with the single-core paradigm in mind. The floorplanning and global routing algorithms are among the latter, and difficult to render any speedup on the GPU due to their inherent sequential nature.
This work parallelizes the floorplanning and global routing algorithm through a novel approach and results in significant speedups for both tools implemented on the GPU hardware. Specifically, with a complete overhaul of solution space and design space exploration, a GPU-based floorplanning algorithm is able to render 4-166X speedup, while achieving similar or improved solutions compared with the sequential algorithm. The GPU-based global routing algorithm is shown to achieve significant speedup against existing state-of-the-art routers, while delivering competitive solution quality. Importantly, this parallel model for global routing renders a stable solution that is independent from the level of parallelism. In summary, this research has shown that through a design paradigm overhaul, sequential algorithms can also benefit from the massively parallel architecture. The findings of this study have a positive impact on the efficiency and design quality of modern EDA design flow. |
author |
Han, Yiding |
author_facet |
Han, Yiding |
author_sort |
Han, Yiding |
title |
Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation |
title_short |
Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation |
title_full |
Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation |
title_fullStr |
Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation |
title_full_unstemmed |
Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation |
title_sort |
graphics processing unit-based computer-aided design algorithms for electronic design automation |
publisher |
DigitalCommons@USU |
publishDate |
2014 |
url |
https://digitalcommons.usu.edu/etd/3868 https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=4904&context=etd |
work_keys_str_mv |
AT hanyiding graphicsprocessingunitbasedcomputeraideddesignalgorithmsforelectronicdesignautomation |
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1719268079560556544 |