Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering

To efficiently capture signal events when performing analog measurements, a competent toolbox is required. In this master thesis, a system for frequency domain triggering is designed and implemented. The implemented system provides advanced frequency domain trigger conditions, in order to ease the c...

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Bibliographic Details
Main Author: Eriksson, Mattias
Format: Others
Language:English
Published: Linköpings universitet, Elektroniksystem 2013
Subjects:
FFT
Online Access:http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-99374
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spelling ndltd-UPSALLA1-oai-DiVA.org-liu-993742013-11-01T04:49:46ZDesign and Implementation of a Real-Time FFT-core for Frequency Domain TriggeringengEriksson, MattiasLinköpings universitet, ElektroniksystemLinköpings universitet, Tekniska högskolan2013FFTdigitizerFPGAtriggeringTo efficiently capture signal events when performing analog measurements, a competent toolbox is required. In this master thesis, a system for frequency domain triggering is designed and implemented. The implemented system provides advanced frequency domain trigger conditions, in order to ease the capture of a desired signal event. A real-time 1024-point pipelined feedforward FFT-core is implemented to transform the signal from the time domain to the frequency domain. The system is designed and synthesized for a Virtex-6 FPGA (XC6VLX240T) and is integrated into SP Devices’ digitizer ADQ1600. The implemented system is able to handle a continuous stream of 1.6GS/s at 16-bit. A small software API is developed that provides runtime configuration of the Triggering conditions. Student thesisinfo:eu-repo/semantics/bachelorThesistexthttp://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-99374application/pdfinfo:eu-repo/semantics/openAccess
collection NDLTD
language English
format Others
sources NDLTD
topic FFT
digitizer
FPGA
triggering
spellingShingle FFT
digitizer
FPGA
triggering
Eriksson, Mattias
Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering
description To efficiently capture signal events when performing analog measurements, a competent toolbox is required. In this master thesis, a system for frequency domain triggering is designed and implemented. The implemented system provides advanced frequency domain trigger conditions, in order to ease the capture of a desired signal event. A real-time 1024-point pipelined feedforward FFT-core is implemented to transform the signal from the time domain to the frequency domain. The system is designed and synthesized for a Virtex-6 FPGA (XC6VLX240T) and is integrated into SP Devices’ digitizer ADQ1600. The implemented system is able to handle a continuous stream of 1.6GS/s at 16-bit. A small software API is developed that provides runtime configuration of the Triggering conditions.
author Eriksson, Mattias
author_facet Eriksson, Mattias
author_sort Eriksson, Mattias
title Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering
title_short Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering
title_full Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering
title_fullStr Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering
title_full_unstemmed Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering
title_sort design and implementation of a real-time fft-core for frequency domain triggering
publisher Linköpings universitet, Elektroniksystem
publishDate 2013
url http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-99374
work_keys_str_mv AT erikssonmattias designandimplementationofarealtimefftcoreforfrequencydomaintriggering
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