NoGAP: Novel Generator of Accelerators and Processors

• Main Author: Karlström, Per Axel
• Format: Doctoral Thesis
• Language: English
• Published: Linköpings universitet, Datorteknik 2010
• Subjects: ADL; ESL; Processor; Accelerator; Compiler; Electrical engineering; Elektroteknik; Computer engineering; Datorteknik
• Online Access: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-60192; http://nbn-resolving.de/urn:isbn:978-91-7393-293-6

ASIPs are needed to handle the future demand of flexible yet highperformance embedded computing. The flexibility of ASIPs makes them preferable over fixed function ASICs. Also, a well designed ASIP, has a power consumption comparable to ASICs.  However the cost associated with ASIP design is a limiting factor for a more wide spread adoption. A number of different tools have been proposed, promising to ease this design process. However all of the current state of the art tools limits the designer due to a template based design process. It blocks design freedoms and limits the I/O bandwidth of the template. We have therefore proposed the Novel Generator of Accelerator and Processors (NoGAP). NoGAP is a design automation tool for ASIP andaccelerator design that puts very few limits on what can be designed, yet NoGAP gives support by automating much of the tedious anderror prone tasks associated with ASIP design. This thesis will present NoGAP and much of its key concepts. Such as; the NoGAP-CL) which is a language used to implement processors in NoGAP, This thesis exposes NoGAP's key technologies, which include automatic bus and wire sizing, instruction decoder and pipeline management, how PC-FSMs can be generated, how an assembler can be generated, and how cycle accurate simulators can be generated. We have so far proven NoGAP's strengths in three extensive case studies, in one a floating point pipelined data path was designed, in another a simple RISC processor was designed, and finally one advanced RISC style DSP was designed using NoGAP. All these case studies points to the same conclusion, that NoGAP speeds up development time, clarify complex pipeline architectures, retains design flexibility, and most importantly does not incur much performance penalty, compared to hand optimized RTL code. We belive that the work presented in this thesis shows that NoGAP, using our proposed novel approach to micro architecture design, can have a significant impact on both academic and industrial hardware design. To our best knowledge NoGAP is the first system that has demonstrated that a template free processor construction framework can be developed and generate high performance hardware solutions. === NoGAP