FFT Hardware Architectures with Reduced Twiddle Factor Sets
The goal of this thesis has been to reduce the hardware cost of SDF FFTs. Inorder to achieve this, two methods for simplifying rotations in FFTs are presented:Decimation and Reduction. When applied, these methods reduce the total amountof angles that the rotators need to rotate, as well as the total...
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| Format: | Others |
| Language: | English |
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Linköpings universitet, Institutionen för systemteknik
2013
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-108148 |