Micro NPU for Baseband Interconnect
The aim of this work is to investigate the possibility to implement a configurable NPU (Network Processing Unit) in the next generation of Ericsson’s EMCAs (Ericsson Multi Core Architecture). The NPU is constructed so that it can be configured for either Ethernet or xIO-s, as either a transmitter or...
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| Format: | Others |
| Language: | English |
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Linköpings universitet, Elektroniksystem
2014
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-103681 |
| Summary: | The aim of this work is to investigate the possibility to implement a configurable NPU (Network Processing Unit) in the next generation of Ericsson’s EMCAs (Ericsson Multi Core Architecture). The NPU is constructed so that it can be configured for either Ethernet or xIO-s, as either a transmitter or a receiver. The motive for doing the work is that many protocols have similar functions and there could be possible advantages to have a configurable protocol choice in future hardware. A model of a NPU will be created in SystemC using the TLM 2.0 interface. The model will be analyzed to evaluate its complexity regarding a possible modification to also make it configurable for CPRI. The result that is presented is that it would be possible to implement a configurable NPU in the future EMCAs. The result is based on the conclusion that the protocols use many similar functions and most of the blocks could be made configurable for use with different protocols. Configurable blocks would benefit a configurable NPU as it would require fewer resources than separate blocks for each protocol. |
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