State space representation for verification of open systems

When designing an open system, there might be no implementation available for cer- tain components at verification time. For such systems, verification has to be based on assumptions on the underspecified components. In this thesis, we present a framework for the verification of open systems through...

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Bibliographic Details
Main Author: Aktug, Irem
Format: Others
Language:English
Published: KTH, Numerisk Analys och Datalogi, NADA 2006
Subjects:
Online Access:http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3973
http://nbn-resolving.de/urn:isbn:91-7178-341-5